[ARM] Re-jig Linux PTE bits to allow room for 4 memory type bits

[linux-2.6-omap-h63xx.git] / arch / arm / include / asm / io.h

diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index ffe07c0f46d8d4019d5f48054d99e94827a7fdee..71934856fc22c38ede7ab9f4a6c1380d9e1dad5d 100644 (file)
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -61,8 +61,9 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
 #define MT_DEVICE_NONSHARED    1
 #define MT_DEVICE_CACHED       2
 #define MT_DEVICE_IXP2000      3
+#define MT_DEVICE_WC           4
 /*
- * types 4 onwards can be found in asm/mach/map.h and are undefined
+ * types 5 onwards can be found in asm/mach/map.h and are undefined
  * for ioremap
  */
 
@@ -82,7 +83,7 @@ extern void __readwrite_bug(const char *fn);
 /*
  * Now, pick up the machine-defined IO definitions
  */
-#include <asm/arch/io.h>
+#include <mach/io.h>
 
 /*
  *  IO port access primitives
@@ -215,11 +216,13 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
 #define ioremap(cookie,size)           __arm_ioremap(cookie, size, MT_DEVICE)
 #define ioremap_nocache(cookie,size)   __arm_ioremap(cookie, size, MT_DEVICE)
 #define ioremap_cached(cookie,size)    __arm_ioremap(cookie, size, MT_DEVICE_CACHED)
+#define ioremap_wc(cookie,size)                __arm_ioremap(cookie, size, MT_DEVICE_WC)
 #define iounmap(cookie)                        __iounmap(cookie)
 #else
 #define ioremap(cookie,size)           __arch_ioremap((cookie), (size), MT_DEVICE)
 #define ioremap_nocache(cookie,size)   __arch_ioremap((cookie), (size), MT_DEVICE)
 #define ioremap_cached(cookie,size)    __arch_ioremap((cookie), (size), MT_DEVICE_CACHED)
+#define ioremap_wc(cookie,size)                __arch_ioremap((cookie), (size), MT_DEVICE_WC)
 #define iounmap(cookie)                        __arch_iounmap(cookie)
 #endif