Merge branch 'for-rmk' of git://pasiphae.extern.pengutronix.de/git/imx/linux-2.6.git

[linux-2.6-omap-h63xx.git] / arch / arm / mach-iop13xx / msi.c

diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c
index 2d2369302220b0ebbacf6eee86890ec0400a3cbd..f34b0ed806305474221051fa2b000199330b9e73 100644 (file)
--- a/arch/arm/mach-iop13xx/msi.c
+++ b/arch/arm/mach-iop13xx/msi.c
@@ -30,52 +30,52 @@ static DECLARE_BITMAP(msi_irq_in_use, IOP13XX_NUM_MSI_IRQS);
 
 /* IMIPR0 CP6 R8 Page 1
  */
-static inline u32 read_imipr_0(void)
+static u32 read_imipr_0(void)
 {
        u32 val;
        asm volatile("mrc p6, 0, %0, c8, c1, 0":"=r" (val));
        return val;
 }
-static inline void write_imipr_0(u32 val)
+static void write_imipr_0(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c8, c1, 0"::"r" (val));
 }
 
 /* IMIPR1 CP6 R9 Page 1
  */
-static inline u32 read_imipr_1(void)
+static u32 read_imipr_1(void)
 {
        u32 val;
        asm volatile("mrc p6, 0, %0, c9, c1, 0":"=r" (val));
        return val;
 }
-static inline void write_imipr_1(u32 val)
+static void write_imipr_1(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c9, c1, 0"::"r" (val));
 }
 
 /* IMIPR2 CP6 R10 Page 1
  */
-static inline u32 read_imipr_2(void)
+static u32 read_imipr_2(void)
 {
        u32 val;
        asm volatile("mrc p6, 0, %0, c10, c1, 0":"=r" (val));
        return val;
 }
-static inline void write_imipr_2(u32 val)
+static void write_imipr_2(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c10, c1, 0"::"r" (val));
 }
 
 /* IMIPR3 CP6 R11 Page 1
  */
-static inline u32 read_imipr_3(void)
+static u32 read_imipr_3(void)
 {
        u32 val;
        asm volatile("mrc p6, 0, %0, c11, c1, 0":"=r" (val));
        return val;
 }
-static inline void write_imipr_3(u32 val)
+static void write_imipr_3(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c11, c1, 0"::"r" (val));
 }
@@ -110,8 +110,7 @@ static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc)
                do {
                        j = find_first_bit(&status, 32);
                        (write_imipr[i])(1 << j); /* write back to clear bit */
-                       desc = irq_desc + IRQ_IOP13XX_MSI_0 + j + (32*i);
-                       desc_handle_irq(IRQ_IOP13XX_MSI_0 + j + (32*i), desc);
+                       generic_handle_irq(IRQ_IOP13XX_MSI_0 + j + (32*i));
                        status = (read_imipr[i])();
                } while (status);
        }
@@ -190,5 +189,5 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
        write_msi_msg(irq, &msg);
        set_irq_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq);
 
-       return irq;
+       return 0;
 }