[ARM] replace remaining __FUNCTION__ occurrences

[linux-2.6-omap-h63xx.git] / arch / arm / mach-ixp4xx / common-pci.c

diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 2d40fe1145f0d2f1f68272d3a46d99772323b463..64be341109b3623a39b2b1e659bbecd0d1760dad 100644 (file)
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -87,7 +87,7 @@ static inline int check_master_abort(void)
        if (isr & PCI_ISR_PFE) {
                /* make sure the Master Abort bit is reset */    
                *PCI_ISR = PCI_ISR_PFE;
-               pr_debug("%s failed\n", __FUNCTION__);
+               pr_debug("%s failed\n", __func__);
                return 1;
        }
 
@@ -374,7 +374,7 @@ void __init ixp4xx_pci_preinit(void)
         * Determine which PCI read method to use.
         * Rev 0 IXP425 requires workaround.
         */
-       if (!(processor_id & 0xf) && !cpu_is_ixp46x()) {
+       if (!(processor_id & 0xf) && cpu_is_ixp42x()) {
                printk("PCI: IXP42x A0 silicon detected - "
                        "PCI Non-Prefetch Workaround Enabled\n");
                ixp4xx_pci_read = ixp4xx_pci_read_errata;
@@ -480,7 +480,7 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
        res[0].flags = IORESOURCE_IO;
 
        res[1].name = "PCI Memory Space";
-       res[1].start = 0x48000000;
+       res[1].start = PCIBIOS_MIN_MEM;
 #ifndef CONFIG_IXP4XX_INDIRECT_PCI
        res[1].end = 0x4bffffff;
 #else
@@ -532,8 +532,6 @@ pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
        return -EIO;
 }
 
-EXPORT_SYMBOL(pci_set_dma_mask);
-EXPORT_SYMBOL(pci_set_consistent_dma_mask);
 EXPORT_SYMBOL(ixp4xx_pci_read);
 EXPORT_SYMBOL(ixp4xx_pci_write);