ARM: OMAP: Fix cpu detection

[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / clock24xx.h

diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index 4de6d9b6886b3871cae945cfbc93533dc416f210..63349fa6d239d2d1e1ddf35f04d223cb501ceff2 100644 (file)
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -635,7 +635,7 @@ static struct clk func_32k_ck = {
        .rate           = 32000,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &propagate_rate,
 };
 
@@ -644,7 +644,7 @@ static struct clk osc_ck = {                /* (*12, *13, 19.2, *26, 38.4)MHz */
        .name           = "osc_ck",
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_PROPAGATES,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "prm_clkdm" },
        .enable         = &omap2_enable_osc_ck,
        .disable        = &omap2_disable_osc_ck,
        .recalc         = &omap2_osc_clk_recalc,
@@ -656,7 +656,7 @@ static struct clk sys_ck = {                /* (*12, *13, 19.2, 26, 38.4)MHz */
        .parent         = &osc_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                ALWAYS_ENABLED | RATE_PROPAGATES,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &omap2_sys_clk_recalc,
 };
 
@@ -665,7 +665,7 @@ static struct clk alt_ck = {                /* Typical 54M or 48M, may not exist */
        .rate           = 54000000,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &propagate_rate,
 };
 
@@ -697,7 +697,7 @@ static struct clk dpll_ck = {
        .dpll_data      = &dpll_dd,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_PROPAGATES | ALWAYS_ENABLED,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &omap2_dpllcore_recalc,
        .set_rate       = &omap2_reprogram_dpllcore,
 };
@@ -708,7 +708,7 @@ static struct clk apll96_ck = {
        .rate           = 96000000,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKEN),
        .enable_bit     = OMAP24XX_EN_96M_PLL_SHIFT,
        .enable         = &omap2_clk_fixed_enable,
@@ -722,7 +722,7 @@ static struct clk apll54_ck = {
        .rate           = 54000000,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKEN),
        .enable_bit     = OMAP24XX_EN_54M_PLL_SHIFT,
        .enable         = &omap2_clk_fixed_enable,
@@ -757,7 +757,7 @@ static struct clk func_54m_ck = {
        .parent         = &apll54_ck,   /* can also be alt_clk */
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "cm_clkdm" },
        .init           = &omap2_init_clksel_parent,
        .clksel_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP24XX_54M_SOURCE,
@@ -770,7 +770,7 @@ static struct clk core_ck = {
        .parent         = &dpll_ck,             /* can also be 32k */
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                ALWAYS_ENABLED | RATE_PROPAGATES,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "cm_clkdm" },
        .recalc         = &followparent_recalc,
 };
 
@@ -797,7 +797,7 @@ static struct clk func_96m_ck = {
        .parent         = &apll96_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "cm_clkdm" },
        .init           = &omap2_init_clksel_parent,
        .clksel_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP2430_96M_SOURCE,
@@ -830,7 +830,7 @@ static struct clk func_48m_ck = {
        .parent         = &apll96_ck,    /* 96M or Alt */
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "cm_clkdm" },
        .init           = &omap2_init_clksel_parent,
        .clksel_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP24XX_48M_SOURCE,
@@ -846,15 +846,16 @@ static struct clk func_12m_ck = {
        .fixed_div      = 4,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "cm_clkdm" },
        .recalc         = &omap2_fixed_divisor_recalc,
 };
 
 /* Secure timer, only available in secure mode */
 static struct clk wdt1_osc_ck = {
-       .name           = "ck_wdt1_osc",
+       .name           = "wdt1_osc_ck",
        .parent         = &osc_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &followparent_recalc,
 };
 
@@ -899,7 +900,7 @@ static struct clk sys_clkout_src = {
        .parent         = &func_54m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_PROPAGATES | OFFSET_GR_MOD,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = _GR_MOD_OFFSET(OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET),
        .enable_bit     = OMAP24XX_CLKOUT_EN_SHIFT,
        .init           = &omap2_init_clksel_parent,
@@ -930,7 +931,7 @@ static struct clk sys_clkout = {
        .parent         = &sys_clkout_src,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                PARENT_CONTROLS_CLOCK | OFFSET_GR_MOD,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "prm_clkdm" },
        .clksel_reg     = _GR_MOD_OFFSET(OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET),
        .clksel_mask    = OMAP24XX_CLKOUT_DIV_MASK,
        .clksel         = sys_clkout_clksel,
@@ -944,7 +945,7 @@ static struct clk sys_clkout2_src = {
        .name           = "sys_clkout2_src",
        .parent         = &func_54m_ck,
        .flags          = CLOCK_IN_OMAP242X | RATE_PROPAGATES | OFFSET_GR_MOD,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "cm_clkdm" },
        .enable_reg     = _GR_MOD_OFFSET(OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET),
        .enable_bit     = OMAP2420_CLKOUT2_EN_SHIFT,
        .init           = &omap2_init_clksel_parent,
@@ -967,7 +968,7 @@ static struct clk sys_clkout2 = {
        .parent         = &sys_clkout2_src,
        .flags          = CLOCK_IN_OMAP242X | PARENT_CONTROLS_CLOCK |
                                OFFSET_GR_MOD,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "cm_clkdm" },
        .clksel_reg     = _GR_MOD_OFFSET(OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET),
        .clksel_mask    = OMAP2420_CLKOUT2_DIV_MASK,
        .clksel         = sys_clkout2_clksel,
@@ -980,7 +981,7 @@ static struct clk emul_ck = {
        .name           = "emul_ck",
        .parent         = &func_54m_ck,
        .flags          = CLOCK_IN_OMAP242X | OFFSET_GR_MOD,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "cm_clkdm" },
        .enable_reg     = _GR_MOD_OFFSET(OMAP24XX_PRCM_CLKEMUL_CTRL_OFFSET),
        .enable_bit     = OMAP24XX_EMULATION_EN_SHIFT,
        .recalc         = &followparent_recalc,
@@ -1089,12 +1090,13 @@ static struct clk dsp_irate_ick = {
        .parent         = &dsp_fck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP |
                                CONFIG_PARTICIPANT | PARENT_CONTROLS_CLOCK,
+       .clkdm          = { .name = "dsp_clkdm" },
        .clksel_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_CLKSEL),
        .clksel_mask    = OMAP24XX_CLKSEL_DSP_IF_MASK,
        .clksel         = dsp_irate_ick_clksel,
        .recalc         = &omap2_clksel_recalc,
        .round_rate     = &omap2_clksel_round_rate,
-       .set_rate             = &omap2_clksel_set_rate
+       .set_rate       = &omap2_clksel_set_rate
 };
 
 /* 2420 only */
@@ -1102,6 +1104,7 @@ static struct clk dsp_ick = {
        .name           = "dsp_ick",     /* apparently ipi and isp */
        .parent         = &dsp_irate_ick,
        .flags          = CLOCK_IN_OMAP242X | DELAYED_APP | CONFIG_PARTICIPANT,
+       .clkdm          = { .name = "dsp_clkdm" },
        .enable_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_ICLKEN),
        .enable_bit     = OMAP2420_EN_DSP_IPI_SHIFT,          /* for ipi */
 };
@@ -1111,6 +1114,7 @@ static struct clk iva2_1_ick = {
        .name           = "iva2_1_ick",
        .parent         = &dsp_irate_ick,
        .flags          = CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT,
+       .clkdm          = { .name = "dsp_clkdm" },
        .enable_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_FCLKEN),
        .enable_bit     = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
 };
@@ -1690,6 +1694,7 @@ static struct clk gpt7_ick = {
        .name           = "gpt7_ick",
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT7_SHIFT,
        .recalc         = &followparent_recalc,
@@ -2079,27 +2084,29 @@ static struct clk gpios_fck = {
        .name           = "gpios_fck",
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_FCLKEN),
        .enable_bit     = OMAP24XX_EN_GPIOS_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
+/* aka WDT2 - REVISIT: we should split wu_l4_iclk from l4_ck */
 static struct clk mpu_wdt_ick = {
        .name           = "mpu_wdt_ick",
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm          = { .name = "core_l4_clkdm" },
+       .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
        .enable_bit     = OMAP24XX_EN_MPU_WDT_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
+/* aka WDT2 */
 static struct clk mpu_wdt_fck = {
        .name           = "mpu_wdt_fck",
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm          = { .name = "wkup_clkdm" },
+       .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_FCLKEN),
        .enable_bit     = OMAP24XX_EN_MPU_WDT_SHIFT,
        .recalc         = &followparent_recalc,
@@ -2116,11 +2123,12 @@ static struct clk sync_32k_ick = {
        .recalc         = &followparent_recalc,
 };
 
+/* REVISIT: parent is really wu_l4_iclk */
 static struct clk wdt1_ick = {
        .name           = "wdt1_ick",
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm          = { .name = "core_l4_clkdm" },
+       .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
        .enable_bit     = OMAP24XX_EN_WDT1_SHIFT,
        .recalc         = &followparent_recalc,
@@ -2582,6 +2590,7 @@ static struct clk mmchs2_fck = {
        .id             = 2,
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP243X,
+       .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP2430_EN_MMCHS2_SHIFT,
        .recalc         = &followparent_recalc,
@@ -2657,6 +2666,7 @@ static struct clk virt_prcm_set = {
        .name           = "virt_prcm_set",
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                VIRTUAL_CLOCK | ALWAYS_ENABLED | DELAYED_APP,
+       .clkdm          = { .name = "virt_opp_clkdm" },
        .parent         = &mpu_ck,      /* Indexed by mpu speed, no parent */
        .recalc         = &omap2_table_mpu_recalc,      /* sets are keyed on mpu rate */
        .set_rate       = &omap2_select_table_rate,