OMAP2/3 clock: mark the rest of the CM clocks as belonging to cm_clkdm

[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / mmu.h

diff --git a/arch/arm/mach-omap2/mmu.h b/arch/arm/mach-omap2/mmu.h
index cbc82afa3a8302326faf7a17ccd1fbe957e90a46..c9eabf0993fde5a6d1ae32c835b6c1b3f6b4606c 100644 (file)
--- a/arch/arm/mach-omap2/mmu.h
+++ b/arch/arm/mach-omap2/mmu.h
@@ -1,13 +1,36 @@
 #ifndef __MACH_OMAP2_MMU_H
 #define __MACH_OMAP2_MMU_H
 
-#include "prcm-regs.h"
-#include <asm/arch/mmu.h>
-#include <asm/io.h>
+#include <linux/io.h>
+#include <mach/mmu.h>
 
 #define MMU_LOCK_BASE_MASK             (0x1f << 10)
 #define MMU_LOCK_VICTIM_MASK           (0x1f << 4)
 
+#define OMAP_MMU_REVISION              0x00
+#define OMAP_MMU_SYSCONFIG             0x10
+#define OMAP_MMU_SYSSTATUS             0x14
+#define OMAP_MMU_IRQSTATUS             0x18
+#define OMAP_MMU_IRQENABLE             0x1c
+#define OMAP_MMU_WALKING_ST            0x40
+#define OMAP_MMU_CNTL                  0x44
+#define OMAP_MMU_FAULT_AD              0x48
+#define OMAP_MMU_TTB                   0x4c
+#define OMAP_MMU_LOCK                  0x50
+#define OMAP_MMU_LD_TLB                        0x54
+#define OMAP_MMU_CAM                   0x58
+#define OMAP_MMU_RAM                   0x5c
+#define OMAP_MMU_GFLUSH                        0x60
+#define OMAP_MMU_FLUSH_ENTRY           0x64
+#define OMAP_MMU_READ_CAM              0x68
+#define OMAP_MMU_READ_RAM              0x6c
+#define OMAP_MMU_EMU_FAULT_AD          0x70
+
+#define OMAP_MMU_CNTL_BURST_16MNGT_EN   0x0020
+#define OMAP_MMU_CNTL_WTL_EN            0x0004
+#define OMAP_MMU_CNTL_MMU_EN            0x0002
+#define OMAP_MMU_CNTL_RESET_SW          0x0001
+
 #define OMAP_MMU_IRQ_MULTIHITFAULT     0x00000010
 #define OMAP_MMU_IRQ_TABLEWALKFAULT    0x00000008
 #define OMAP_MMU_IRQ_EMUMISS           0x00000004
@@ -36,10 +59,7 @@
 
 #define IOMAP_VAL      0x3f
 
-#define omap_dsp_request_mem() do { } while (0)
-#define omap_dsp_release_mem() do { } while (0)
-
-#define INIT_TLB_ENTRY(ent,v,p,ps)                             \
+#define INIT_TLB_ENTRY(ent, v, p, ps)                          \
 do {                                                           \
        (ent)->va       = (v);                                  \
        (ent)->pa       = (p);                                  \
@@ -51,7 +71,7 @@ do {                                                          \
        (ent)->tlb      = 1;                                    \
 } while (0)
 
-#define INIT_TLB_ENTRY_4KB_PRESERVED(ent,v,p) \
+#define INIT_TLB_ENTRY_4KB_PRESERVED(ent, v, p)                \
 do {                                                           \
        (ent)->va       = (v);                                  \
        (ent)->pa       = (p);                                  \
@@ -62,7 +82,7 @@ do {                                                          \
        (ent)->mixed    = 0;                                    \
 } while (0)
 
-#define INIT_TLB_ENTRY_4KB_ES32_PRESERVED(ent,v,p)             \
+#define INIT_TLB_ENTRY_4KB_ES32_PRESERVED(ent, v, p)           \
 do {                                                           \
        (ent)->va       = (v);                                  \
        (ent)->pa       = (p);                                  \
@@ -73,8 +93,6 @@ do {                                                          \
        (ent)->mixed    = 0;                                    \
 } while (0)
 
-extern struct omap_mmu_ops omap2_mmu_ops;
-
 struct omap_mmu_tlb_entry {
        unsigned long va;
        unsigned long pa;
@@ -87,15 +105,13 @@ struct omap_mmu_tlb_entry {
 static inline unsigned long
 omap_mmu_read_reg(struct omap_mmu *mmu, unsigned long reg)
 {
-       return __raw_readl(mmu->base + reg);
+       return __raw_readl((void __iomem *)(mmu->base + reg));
 }
 
 static inline void omap_mmu_write_reg(struct omap_mmu *mmu,
                               unsigned long val, unsigned long reg)
 {
-       __raw_writel(val, mmu->base + reg);
-}
-static inline void omap_mmu_itack(struct omap_mmu *mmu)
-{
+       __raw_writel(val, (void __iomem *)(mmu->base + reg));
 }
+
 #endif /* __MACH_OMAP2_MMU_H */