Merge git://git.kernel.org/pub/scm/linux/kernel/git/sfrench/cifs-2.6

[linux-2.6-omap-h63xx.git] / arch / arm / mach-pxa / generic.c

diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 98df63898d1d4392c8eb57824959c703804d623d..1c34946ee16e60c0fb3f6ff6491efc276455e108 100644 (file)
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -42,9 +42,40 @@
 #include "devices.h"
 #include "generic.h"
 
+/*
+ * Get the clock frequency as reflected by CCCR and the turbo flag.
+ * We assume these values have been applied via a fcs.
+ * If info is not 0 we also display the current settings.
+ */
+unsigned int get_clk_frequency_khz(int info)
+{
+       if (cpu_is_pxa21x() || cpu_is_pxa25x())
+               return pxa25x_get_clk_frequency_khz(info);
+       else if (cpu_is_pxa27x())
+               return pxa27x_get_clk_frequency_khz(info);
+       else
+               return pxa3xx_get_clk_frequency_khz(info);
+}
+EXPORT_SYMBOL(get_clk_frequency_khz);
+
+/*
+ * Return the current memory clock frequency in units of 10kHz
+ */
+unsigned int get_memclk_frequency_10khz(void)
+{
+       if (cpu_is_pxa21x() || cpu_is_pxa25x())
+               return pxa25x_get_memclk_frequency_10khz();
+       else if (cpu_is_pxa27x())
+               return pxa27x_get_memclk_frequency_10khz();
+       else
+               return pxa3xx_get_memclk_frequency_10khz();
+}
+EXPORT_SYMBOL(get_memclk_frequency_10khz);
+
 /*
  * Handy function to set GPIO alternate functions
  */
+int pxa_last_gpio;
 
 int pxa_gpio_mode(int gpio_mode)
 {
@@ -53,7 +84,7 @@ int pxa_gpio_mode(int gpio_mode)
        int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
        int gafr;
 
-       if (gpio > PXA_LAST_GPIO)
+       if (gpio > pxa_last_gpio)
                return -EINVAL;
 
        local_irq_save(flags);
@@ -74,6 +105,44 @@ int pxa_gpio_mode(int gpio_mode)
 
 EXPORT_SYMBOL(pxa_gpio_mode);
 
+int gpio_direction_input(unsigned gpio)
+{
+       unsigned long flags;
+       u32 mask;
+
+       if (gpio > pxa_last_gpio)
+               return -EINVAL;
+
+       mask = GPIO_bit(gpio);
+       local_irq_save(flags);
+       GPDR(gpio) &= ~mask;
+       local_irq_restore(flags);
+
+       return 0;
+}
+EXPORT_SYMBOL(gpio_direction_input);
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+       unsigned long flags;
+       u32 mask;
+
+       if (gpio > pxa_last_gpio)
+               return -EINVAL;
+
+       mask = GPIO_bit(gpio);
+       local_irq_save(flags);
+       if (value)
+               GPSR(gpio) = mask;
+       else
+               GPCR(gpio) = mask;
+       GPDR(gpio) |= mask;
+       local_irq_restore(flags);
+
+       return 0;
+}
+EXPORT_SYMBOL(gpio_direction_output);
+
 /*
  * Return GPIO level
  */
@@ -97,7 +166,7 @@ EXPORT_SYMBOL(pxa_gpio_set_value);
 /*
  * Routine to safely enable or disable a clock in the CKEN
  */
-void pxa_set_cken(int clock, int enable)
+void __pxa_set_cken(int clock, int enable)
 {
        unsigned long flags;
        local_irq_save(flags);
@@ -110,7 +179,7 @@ void pxa_set_cken(int clock, int enable)
        local_irq_restore(flags);
 }
 
-EXPORT_SYMBOL(pxa_set_cken);
+EXPORT_SYMBOL(__pxa_set_cken);
 
 /*
  * Intel PXA2xx internal register mapping.