#include <asm/hardware/arm_scu.h>
#include <asm/hardware.h>
#include <asm/io.h>
+#include <asm/mach-types.h>
extern void realview_secondary_startup(void);
{
unsigned int ncores;
- ncores = __raw_readl(__io_address(REALVIEW_MPCORE_SCU_BASE) + SCU_CONFIG);
+ if (machine_is_realview_eb() && core_tile_eb11mp()) {
+ ncores = __raw_readl(__io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CONFIG);
+ ncores = (ncores & 0x03) + 1;
+ } else
+ ncores = 1;
- return (ncores & 0x03) + 1;
+ return ncores;
}
static DEFINE_SPINLOCK(boot_lock);
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(__io_address(REALVIEW_GIC_CPU_BASE));
+ gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
/*
* let the primary processor know we're out of the
* pen, then head off into the C entry point
*/
pen_release = -1;
+ smp_wmb();
/*
* Synchronise with the boot thread.
timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) {
+ smp_rmb();
if (pen_release == -1)
break;
if (max_cpus > ncores)
max_cpus = ncores;
+#ifdef CONFIG_LOCAL_TIMERS
/*
- * Enable the local timer for primary CPU
+ * Enable the local timer for primary CPU. If the device is
+ * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
+ * realview_timer_init
*/
- local_timer_setup(cpu);
+ if (machine_is_realview_eb() && core_tile_eb11mp())
+ local_timer_setup(cpu);
+#endif
/*
* Initialise the present map, which describes the set of CPUs