[ARM] 3591/1: Anubis: IDE device definitions

[linux-2.6-omap-h63xx.git] / arch / arm / mach-s3c2410 / mach-anubis.c

diff --git a/arch/arm/mach-s3c2410/mach-anubis.c b/arch/arm/mach-s3c2410/mach-anubis.c
index 8390b685c2b61853ac7ead39016427e660a79447..4a92d6f92d6b8be1e57d7a3e50eb4752c82375c6 100644 (file)
--- a/arch/arm/mach-s3c2410/mach-anubis.c
+++ b/arch/arm/mach-s3c2410/mach-anubis.c
@@ -56,8 +56,16 @@
 static struct map_desc anubis_iodesc[] __initdata = {
   /* ISA IO areas */
 
-  { (u32)S3C24XX_VA_ISA_BYTE, 0x0,        SZ_16M, MT_DEVICE },
-  { (u32)S3C24XX_VA_ISA_WORD, 0x0,        SZ_16M, MT_DEVICE },
+  {
+       .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
+       .pfn            = __phys_to_pfn(0x0),
+       .length         = SZ_4M,
+       .type           = MT_DEVICE
+  }, {
+       .virtual        = (u32)S3C24XX_VA_ISA_WORD,
+       .pfn            = __phys_to_pfn(0x0),
+       .length         = SZ_4M, MT_DEVICE
+  },
 
   /* we could possibly compress the next set down into a set of smaller tables
    * pagetables, but that would mean using an L2 section, and it still means
@@ -66,16 +74,41 @@ static struct map_desc anubis_iodesc[] __initdata = {
 
   /* CPLD control registers */
 
-  { (u32)ANUBIS_VA_CTRL1,      ANUBIS_PA_CTRL1,        SZ_4K, MT_DEVICE },
-  { (u32)ANUBIS_VA_CTRL2,      ANUBIS_PA_CTRL2,        SZ_4K, MT_DEVICE },
+  {
+       .virtual        = (u32)ANUBIS_VA_CTRL1,
+       .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL1),
+       .length         = SZ_4K,
+       .type           = MT_DEVICE
+  }, {
+       .virtual        = (u32)ANUBIS_VA_CTRL2,
+       .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL2),
+       .length         = SZ_4K,
+       .type           =MT_DEVICE
+  },
 
   /* IDE drives */
 
-  { (u32)ANUBIS_IDEPRI,                S3C2410_CS3,            SZ_1M, MT_DEVICE },
-  { (u32)ANUBIS_IDEPRIAUX,     S3C2410_CS3+(1<<26),    SZ_1M, MT_DEVICE },
-
-  { (u32)ANUBIS_IDESEC,                S3C2410_CS4,            SZ_1M, MT_DEVICE },
-  { (u32)ANUBIS_IDESECAUX,     S3C2410_CS4+(1<<26),    SZ_1M, MT_DEVICE },
+  {
+       .virtual        = (u32)ANUBIS_IDEPRI,
+       .pfn            = __phys_to_pfn(S3C2410_CS3),
+       .length         = SZ_1M,
+       .type           = MT_DEVICE
+  }, {
+       .virtual        = (u32)ANUBIS_IDEPRIAUX,
+       .pfn            = __phys_to_pfn(S3C2410_CS3+(1<<26)),
+       .length         = SZ_1M,
+       .type           = MT_DEVICE
+  }, {
+       .virtual        = (u32)ANUBIS_IDESEC,
+       .pfn            = __phys_to_pfn(S3C2410_CS4),
+       .length         = SZ_1M,
+       .type           = MT_DEVICE
+  }, {
+       .virtual        = (u32)ANUBIS_IDESECAUX,
+       .pfn            = __phys_to_pfn(S3C2410_CS4+(1<<26)),
+       .length         = SZ_1M,
+       .type           = MT_DEVICE
+  },
 };
 
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
@@ -98,7 +131,7 @@ static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = {
 };
 
 
-static struct s3c2410_uartcfg anubis_uartcfgs[] = {
+static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
                .flags       = 0,
@@ -199,13 +232,61 @@ static void anubis_nand_select(struct s3c2410_nand_set *set, int slot)
 
 static struct s3c2410_platform_nand anubis_nand_info = {
        .tacls          = 25,
-       .twrph0         = 80,
-       .twrph1         = 80,
+       .twrph0         = 55,
+       .twrph1         = 40,
        .nr_sets        = ARRAY_SIZE(anubis_nand_sets),
        .sets           = anubis_nand_sets,
        .select_chip    = anubis_nand_select,
 };
 
+/* IDE channels */
+
+static struct resource anubis_ide0_resource[] = {
+       {
+               .start  = S3C2410_CS3,
+               .end    = S3C2410_CS3 + (8*32) - 1,
+               .flags  = IORESOURCE_MEM,
+       }, {
+               .start  = S3C2410_CS3 + (1<<26),
+               .end    = S3C2410_CS3 + (1<<26) + (8*32) - 1,
+               .flags  = IORESOURCE_MEM,
+       }, {
+               .start  = IRQ_IDE0,
+               .end    = IRQ_IDE0,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device anubis_device_ide0 = {
+       .name           = "simtec-ide",
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(anubis_ide0_resource),
+       .resource       = anubis_ide0_resource,
+};
+
+static struct resource anubis_ide1_resource[] = {
+       {
+               .start  = S3C2410_CS4,
+               .end    = S3C2410_CS4 + (8*32) - 1,
+               .flags  = IORESOURCE_MEM,
+       }, {
+               .start  = S3C2410_CS4 + (1<<26),
+               .end    = S3C2410_CS4 + (1<<26) + (8*32) - 1,
+               .flags  = IORESOURCE_MEM,
+       }, {
+               .start  = IRQ_IDE0,
+               .end    = IRQ_IDE0,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+
+static struct platform_device anubis_device_ide1 = {
+       .name           = "simtec-ide",
+       .id             = 1,
+       .num_resources  = ARRAY_SIZE(anubis_ide1_resource),
+       .resource       = anubis_ide1_resource,
+};
 
 /* Standard Anubis devices */
 
@@ -216,6 +297,8 @@ static struct platform_device *anubis_devices[] __initdata = {
        &s3c_device_i2c,
        &s3c_device_rtc,
        &s3c_device_nand,
+       &anubis_device_ide0,
+       &anubis_device_ide1,
 };
 
 static struct clk *anubis_clocks[] = {
@@ -261,7 +344,6 @@ static void __init anubis_map_io(void)
 
 MACHINE_START(ANUBIS, "Simtec-Anubis")
        /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
-       .phys_ram       = S3C2410_SDRAM_PA,
        .phys_io        = S3C2410_PA_UART,
        .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
        .boot_params    = S3C2410_SDRAM_PA + 0x100,