Merge branch 'omap3-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind...

[linux-2.6-omap-h63xx.git] / arch / arm / mach-versatile / include / mach / irqs.h

diff --git a/arch/arm/mach-versatile/include/mach/irqs.h b/arch/arm/mach-versatile/include/mach/irqs.h
index 216a1312e62ed890034a913018f64d2b26c93197..9bfdb30e1f3f3e91694464857b4e5c561752f3f1 100644 (file)
--- a/arch/arm/mach-versatile/include/mach/irqs.h
+++ b/arch/arm/mach-versatile/include/mach/irqs.h
@@ -60,39 +60,6 @@
 #define IRQ_VICSOURCE31                (IRQ_VIC_START + INT_VICSOURCE31)
 #define IRQ_VIC_END            (IRQ_VIC_START + 31)
 
-#define IRQMASK_WDOGINT                INTMASK_WDOGINT
-#define IRQMASK_SOFTINT                INTMASK_SOFTINT
-#define IRQMASK_COMMRx                 INTMASK_COMMRx
-#define IRQMASK_COMMTx                 INTMASK_COMMTx
-#define IRQMASK_TIMERINT0_1    INTMASK_TIMERINT0_1
-#define IRQMASK_TIMERINT2_3    INTMASK_TIMERINT2_3
-#define IRQMASK_GPIOINT0       INTMASK_GPIOINT0
-#define IRQMASK_GPIOINT1       INTMASK_GPIOINT1
-#define IRQMASK_GPIOINT2       INTMASK_GPIOINT2
-#define IRQMASK_GPIOINT3       INTMASK_GPIOINT3
-#define IRQMASK_RTCINT                 INTMASK_RTCINT
-#define IRQMASK_SSPINT                 INTMASK_SSPINT
-#define IRQMASK_UARTINT0       INTMASK_UARTINT0
-#define IRQMASK_UARTINT1       INTMASK_UARTINT1
-#define IRQMASK_UARTINT2       INTMASK_UARTINT2
-#define IRQMASK_SCIINT                 INTMASK_SCIINT
-#define IRQMASK_CLCDINT                INTMASK_CLCDINT
-#define IRQMASK_DMAINT                 INTMASK_DMAINT
-#define IRQMASK_PWRFAILINT     INTMASK_PWRFAILINT
-#define IRQMASK_MBXINT                 INTMASK_MBXINT
-#define IRQMASK_GNDINT                 INTMASK_GNDINT
-#define IRQMASK_VICSOURCE21    INTMASK_VICSOURCE21
-#define IRQMASK_VICSOURCE22    INTMASK_VICSOURCE22
-#define IRQMASK_VICSOURCE23    INTMASK_VICSOURCE23
-#define IRQMASK_VICSOURCE24    INTMASK_VICSOURCE24
-#define IRQMASK_VICSOURCE25    INTMASK_VICSOURCE25
-#define IRQMASK_VICSOURCE26    INTMASK_VICSOURCE26
-#define IRQMASK_VICSOURCE27    INTMASK_VICSOURCE27
-#define IRQMASK_VICSOURCE28    INTMASK_VICSOURCE28
-#define IRQMASK_VICSOURCE29    INTMASK_VICSOURCE29
-#define IRQMASK_VICSOURCE30    INTMASK_VICSOURCE30
-#define IRQMASK_VICSOURCE31    INTMASK_VICSOURCE31
-
 /* 
  *  FIQ interrupts definitions are the same as the INT definitions.
  */
@@ -130,39 +97,6 @@
 #define FIQ_VICSOURCE31                INT_VICSOURCE31
 
 
-#define FIQMASK_WDOGINT                INTMASK_WDOGINT
-#define FIQMASK_SOFTINT                INTMASK_SOFTINT
-#define FIQMASK_COMMRx                 INTMASK_COMMRx
-#define FIQMASK_COMMTx                 INTMASK_COMMTx
-#define FIQMASK_TIMERINT0_1    INTMASK_TIMERINT0_1
-#define FIQMASK_TIMERINT2_3    INTMASK_TIMERINT2_3
-#define FIQMASK_GPIOINT0       INTMASK_GPIOINT0
-#define FIQMASK_GPIOINT1       INTMASK_GPIOINT1
-#define FIQMASK_GPIOINT2       INTMASK_GPIOINT2
-#define FIQMASK_GPIOINT3       INTMASK_GPIOINT3
-#define FIQMASK_RTCINT                 INTMASK_RTCINT
-#define FIQMASK_SSPINT                 INTMASK_SSPINT
-#define FIQMASK_UARTINT0       INTMASK_UARTINT0
-#define FIQMASK_UARTINT1       INTMASK_UARTINT1
-#define FIQMASK_UARTINT2       INTMASK_UARTINT2
-#define FIQMASK_SCIINT                 INTMASK_SCIINT
-#define FIQMASK_CLCDINT                INTMASK_CLCDINT
-#define FIQMASK_DMAINT                 INTMASK_DMAINT
-#define FIQMASK_PWRFAILINT     INTMASK_PWRFAILINT
-#define FIQMASK_MBXINT                 INTMASK_MBXINT
-#define FIQMASK_GNDINT                 INTMASK_GNDINT
-#define FIQMASK_VICSOURCE21    INTMASK_VICSOURCE21
-#define FIQMASK_VICSOURCE22    INTMASK_VICSOURCE22
-#define FIQMASK_VICSOURCE23    INTMASK_VICSOURCE23
-#define FIQMASK_VICSOURCE24    INTMASK_VICSOURCE24
-#define FIQMASK_VICSOURCE25    INTMASK_VICSOURCE25
-#define FIQMASK_VICSOURCE26    INTMASK_VICSOURCE26
-#define FIQMASK_VICSOURCE27    INTMASK_VICSOURCE27
-#define FIQMASK_VICSOURCE28    INTMASK_VICSOURCE28
-#define FIQMASK_VICSOURCE29    INTMASK_VICSOURCE29
-#define FIQMASK_VICSOURCE30    INTMASK_VICSOURCE30
-#define FIQMASK_VICSOURCE31    INTMASK_VICSOURCE31
-
 /*
  * Secondary interrupt controller
  */
@@ -188,24 +122,4 @@
 #define IRQ_SIC_PCI3           (IRQ_SIC_START + SIC_INT_PCI3)
 #define IRQ_SIC_END            63
 
-#define SIC_IRQMASK_MMCI0B     SIC_INTMASK_MMCI0B
-#define SIC_IRQMASK_MMCI1B     SIC_INTMASK_MMCI1B
-#define SIC_IRQMASK_KMI0       SIC_INTMASK_KMI0
-#define SIC_IRQMASK_KMI1       SIC_INTMASK_KMI1
-#define SIC_IRQMASK_SCI3       SIC_INTMASK_SCI3
-#define SIC_IRQMASK_UART3      SIC_INTMASK_UART3
-#define SIC_IRQMASK_CLCD       SIC_INTMASK_CLCD
-#define SIC_IRQMASK_TOUCH      SIC_INTMASK_TOUCH
-#define SIC_IRQMASK_KEYPAD     SIC_INTMASK_KEYPAD
-#define SIC_IRQMASK_DoC                SIC_INTMASK_DoC
-#define SIC_IRQMASK_MMCI0A     SIC_INTMASK_MMCI0A
-#define SIC_IRQMASK_MMCI1A     SIC_INTMASK_MMCI1A
-#define SIC_IRQMASK_AACI       SIC_INTMASK_AACI
-#define SIC_IRQMASK_ETH                SIC_INTMASK_ETH
-#define SIC_IRQMASK_USB                SIC_INTMASK_USB
-#define SIC_IRQMASK_PCI0       SIC_INTMASK_PCI0
-#define SIC_IRQMASK_PCI1       SIC_INTMASK_PCI1
-#define SIC_IRQMASK_PCI2       SIC_INTMASK_PCI2
-#define SIC_IRQMASK_PCI3       SIC_INTMASK_PCI3
-
 #define NR_IRQS                        64