Merge current mainline tree into linux-omap tree

[linux-2.6-omap-h63xx.git] / arch / arm / mm / proc-arm1020e.S

diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 117a946c28c8b1bb87593795b83e90b2dbf0cb76..fe2b0ae70274a9ca48ffc5442c7b16259550e90c 100644 (file)
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -29,11 +29,13 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
+#include "proc-macros.S"
+
 /*
  * This is the maximum size of an area which will be invalidated
  * using the single invalidate entry instructions.  Anything larger
@@ -379,7 +381,7 @@ ENTRY(cpu_arm1020e_switch_mm)
  * Set a PTE and flush it out
  */
        .align  5
-ENTRY(cpu_arm1020e_set_pte)
+ENTRY(cpu_arm1020e_set_pte_ext)
 #ifdef CONFIG_MMU
        str     r1, [r0], #-2048                @ linux version
 
@@ -421,11 +423,11 @@ __arm1020e_setup:
 #ifdef CONFIG_MMU
        mcr     p15, 0, r0, c8, c7              @ invalidate I,D TLBs on v4
 #endif
+       adr     r5, arm1020e_crval
+       ldmia   r5, {r5, r6}
        mrc     p15, 0, r0, c1, c0              @ get control register v4
-       ldr     r5, arm1020e_cr1_clear
        bic     r0, r0, r5
-       ldr     r5, arm1020e_cr1_set
-       orr     r0, r0, r5
+       orr     r0, r0, r6
 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
        orr     r0, r0, #0x4000                 @ .R.. .... .... ....
 #endif
@@ -437,12 +439,9 @@ __arm1020e_setup:
         * .RVI ZFRS BLDP WCAM
         * .011 1001 ..11 0101
         */
-       .type   arm1020e_cr1_clear, #object
-       .type   arm1020e_cr1_set, #object
-arm1020e_cr1_clear:
-       .word   0x5f3f
-arm1020e_cr1_set:
-       .word   0x3935
+       .type   arm1020e_crval, #object
+arm1020e_crval:
+       crval   clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001930
 
        __INITDATA
 
@@ -459,7 +458,8 @@ arm1020e_processor_functions:
        .word   cpu_arm1020e_do_idle
        .word   cpu_arm1020e_dcache_clean_area
        .word   cpu_arm1020e_switch_mm
-       .word   cpu_arm1020e_set_pte
+       .word   cpu_arm1020e_set_pte_ext
+       .word   pabort_noifar
        .size   arm1020e_processor_functions, . - arm1020e_processor_functions
 
        .section ".rodata"
@@ -476,25 +476,7 @@ cpu_elf_name:
 
        .type   cpu_arm1020e_name, #object
 cpu_arm1020e_name:
-       .ascii  "ARM1020E"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
-       .ascii  "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
-       .ascii  "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-       .ascii  "(wt)"
-#else
-       .ascii  "(wb)"
-#endif
-#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
-       .ascii  "B"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
-       .ascii  "RR"
-#endif
-       .ascii  "\0"
+       .asciz  "ARM1020E"
        .size   cpu_arm1020e_name, . - cpu_arm1020e_name
 
        .align
@@ -505,6 +487,10 @@ cpu_arm1020e_name:
 __arm1020e_proc_info:
        .long   0x4105a200                      @ ARM 1020TE (Architecture v5TE)
        .long   0xff0ffff0
+       .long   PMD_TYPE_SECT | \
+               PMD_BIT4 | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        .long   PMD_TYPE_SECT | \
                PMD_BIT4 | \
                PMD_SECT_AP_WRITE | \