Merge branch 'next-merged' of git://aeryn.fluff.org.uk/bjdooks/linux into devel

[linux-2.6-omap-h63xx.git] / arch / arm / plat-mxc / irq.c

diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c
index 1053b666c676fd5217226fd3301ca90d23ca6e3f..e937c8759a97779231ae48f8c759f8de2877d437 100644 (file)
--- a/arch/arm/plat-mxc/irq.c
+++ b/arch/arm/plat-mxc/irq.c
@@ -17,9 +17,11 @@
  * MA  02110-1301, USA.
  */
 
+#include <linux/module.h>
 #include <linux/irq.h>
-#include <asm/io.h>
+#include <linux/io.h>
 #include <mach/common.h>
+#include <asm/mach/irq.h>
 
 #define AVIC_BASE              IO_ADDRESS(AVIC_BASE_ADDR)
 #define AVIC_INTCNTL           (AVIC_BASE + 0x00)      /* int control reg */
@@ -30,14 +32,7 @@
 #define AVIC_INTENABLEL                (AVIC_BASE + 0x14)      /* int enable reg low */
 #define AVIC_INTTYPEH          (AVIC_BASE + 0x18)      /* int type reg high */
 #define AVIC_INTTYPEL          (AVIC_BASE + 0x1C)      /* int type reg low */
-#define AVIC_NIPRIORITY7       (AVIC_BASE + 0x20)      /* norm int priority lvl7 */
-#define AVIC_NIPRIORITY6       (AVIC_BASE + 0x24)      /* norm int priority lvl6 */
-#define AVIC_NIPRIORITY5       (AVIC_BASE + 0x28)      /* norm int priority lvl5 */
-#define AVIC_NIPRIORITY4       (AVIC_BASE + 0x2C)      /* norm int priority lvl4 */
-#define AVIC_NIPRIORITY3       (AVIC_BASE + 0x30)      /* norm int priority lvl3 */
-#define AVIC_NIPRIORITY2       (AVIC_BASE + 0x34)      /* norm int priority lvl2 */
-#define AVIC_NIPRIORITY1       (AVIC_BASE + 0x38)      /* norm int priority lvl1 */
-#define AVIC_NIPRIORITY0       (AVIC_BASE + 0x3C)      /* norm int priority lvl0 */
+#define AVIC_NIPRIORITY(x)     (AVIC_BASE + (0x20 + 4 * (7 - (x)))) /* int priority */
 #define AVIC_NIVECSR           (AVIC_BASE + 0x40)      /* norm int vector/status */
 #define AVIC_FIVECSR           (AVIC_BASE + 0x44)      /* fast int vector/status */
 #define AVIC_INTSRCH           (AVIC_BASE + 0x48)      /* int source reg high */
@@ -54,6 +49,46 @@
 #define IIM_PROD_REV_SH                3
 #define IIM_PROD_REV_LEN       5
 
+#ifdef CONFIG_MXC_IRQ_PRIOR
+void imx_irq_set_priority(unsigned char irq, unsigned char prio)
+{
+       unsigned int temp;
+       unsigned int mask = 0x0F << irq % 8 * 4;
+
+       if (irq > 63)
+               return;
+
+       temp = __raw_readl(AVIC_NIPRIORITY(irq / 8));
+       temp &= ~mask;
+       temp |= prio & mask;
+
+       __raw_writel(temp, AVIC_NIPRIORITY(irq / 8));
+}
+EXPORT_SYMBOL(imx_irq_set_priority);
+#endif
+
+#ifdef CONFIG_FIQ
+int mxc_set_irq_fiq(unsigned int irq, unsigned int type)
+{
+       unsigned int irqt;
+
+       if (irq >= MXC_MAX_INT_LINES)
+               return -EINVAL;
+
+       if (irq < MXC_MAX_INT_LINES / 2) {
+               irqt = __raw_readl(AVIC_INTTYPEL) & ~(1 << irq);
+               __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEL);
+       } else {
+               irq -= MXC_MAX_INT_LINES / 2;
+               irqt = __raw_readl(AVIC_INTTYPEH) & ~(1 << irq);
+               __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEH);
+       }
+
+       return 0;
+}
+EXPORT_SYMBOL(mxc_set_irq_fiq);
+#endif /* CONFIG_FIQ */
+
 /* Disable interrupt number "irq" in the AVIC */
 static void mxc_mask_irq(unsigned int irq)
 {
@@ -80,7 +115,6 @@ static struct irq_chip mxc_avic_chip = {
 void __init mxc_init_irq(void)
 {
        int i;
-       u32 reg;
 
        /* put the AVIC into the reset value with
         * all interrupts disabled
@@ -101,13 +135,17 @@ void __init mxc_init_irq(void)
                set_irq_flags(i, IRQF_VALID);
        }
 
-       /* Set WDOG2's interrupt the highest priority level (bit 28-31) */
-       reg = __raw_readl(AVIC_NIPRIORITY6);
-       reg |= (0xF << 28);
-       __raw_writel(reg, AVIC_NIPRIORITY6);
+       /* Set default priority value (0) for all IRQ's */
+       for (i = 0; i < 8; i++)
+               __raw_writel(0, AVIC_NIPRIORITY(i));
 
        /* init architectures chained interrupt handler */
        mxc_register_gpios();
 
+#ifdef CONFIG_FIQ
+       /* Initialize FIQ */
+       init_FIQ();
+#endif
+
        printk(KERN_INFO "MXC IRQ initialized\n");
 }