r8169: phy init cleanup

[linux-2.6-omap-h63xx.git] / arch / i386 / Kconfig.cpu

diff --git a/arch/i386/Kconfig.cpu b/arch/i386/Kconfig.cpu
index dce6124cb842a8307625ef673b8d97c4c99007cd..0e2adadf59057dc906466786f4049ac8ca33aa64 100644 (file)
--- a/arch/i386/Kconfig.cpu
+++ b/arch/i386/Kconfig.cpu
@@ -108,17 +108,43 @@ config MCORE2
        bool "Core 2/newer Xeon"
        help
          Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
-         CPUs. You can distingush newer from older Xeons by the CPU family
-         in /proc/cpuinfo. Newer ones have 6.
+         CPUs. You can distinguish newer from older Xeons by the CPU family
+         in /proc/cpuinfo. Newer ones have 6 and older ones 15 (not a typo)
 
 config MPENTIUM4
        bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
        help
          Select this for Intel Pentium 4 chips.  This includes the
-         Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M
-         (not Pentium M) chips.  This option enables compile flags
-         optimized for the chip, uses the correct cache shift, and
-         applies any applicable Pentium III optimizations.
+         Pentium 4, Pentium D, P4-based Celeron and Xeon, and
+         Pentium-4 M (not Pentium M) chips.  This option enables compile
+         flags optimized for the chip, uses the correct cache line size, and
+         applies any applicable optimizations.
+
+         CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
+
+         Select this for:
+           Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
+               -Willamette
+               -Northwood
+               -Mobile Pentium 4
+               -Mobile Pentium 4 M
+               -Extreme Edition (Gallatin)
+               -Prescott
+               -Prescott 2M
+               -Cedar Mill
+               -Presler
+               -Smithfiled
+           Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
+               -Foster
+               -Prestonia
+               -Gallatin
+               -Nocona
+               -Irwindale
+               -Cranford
+               -Potomac
+               -Paxville
+               -Dempsey
+
 
 config MK6
        bool "K6/K6-II/K6-III"
@@ -172,7 +198,7 @@ config MWINCHIP3D
        help
          Select this for an IDT Winchip-2A or 3.  Linux and GCC
          treat this chip as a 586TSC with some extended instructions
-         and alignment reqirements.  Also enable out of order memory
+         and alignment requirements.  Also enable out of order memory
          stores for this CPU, which can increase performance of some
          operations.
 
@@ -297,11 +323,6 @@ config X86_POPAD_OK
        depends on !M386
        default y
 
-config X86_CMPXCHG64
-       bool
-       depends on !M386 && !M486
-       default y
-
 config X86_ALIGNMENT_16
        bool
        depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
@@ -344,8 +365,8 @@ config X86_CMOV
        depends on (MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7)
        default y
 
-config X86_MINIMUM_CPU_MODEL
+config X86_MINIMUM_CPU_FAMILY
        int
-       default "4" if X86_XADD || X86_CMPXCHG || X86_BSWAP
-       default "0"
+       default "4" if X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK
+       default "3"