signal/timer/event: signalfd wire up x86 arches

[linux-2.6-omap-h63xx.git] / arch / i386 / kernel / quirks.c

diff --git a/arch/i386/kernel/quirks.c b/arch/i386/kernel/quirks.c
index a01320a7b63651ba6ec32914c1b5db16e44455d8..9f6ab1789bb05fc81593c47211b16bc45be894e1 100644 (file)
--- a/arch/i386/kernel/quirks.c
+++ b/arch/i386/kernel/quirks.c
@@ -3,23 +3,10 @@
  */
 #include <linux/pci.h>
 #include <linux/irq.h>
-#include <asm/pci-direct.h>
-#include <asm/genapic.h>
-#include <asm/cpu.h>
 
 #if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_SMP) && defined(CONFIG_PCI)
-static void __devinit verify_quirk_intel_irqbalance(struct pci_dev *dev)
-{
-#ifdef CONFIG_X86_64
-       if (genapic !=  &apic_flat)
-               panic("APIC mode must be flat on this system\n");
-#elif defined(CONFIG_X86_GENERICARCH)
-       if (genapic != &apic_default)
-               panic("APIC mode must be default(flat) on this system. Use apic=default\n");
-#endif
-}
 
-void __init quirk_intel_irqbalance(void)
+static void __devinit quirk_intel_irqbalance(struct pci_dev *dev)
 {
        u8 config, rev;
        u32 word;
@@ -29,18 +16,18 @@ void __init quirk_intel_irqbalance(void)
         * based platforms.
         * Disable SW irqbalance/affinity on those platforms.
         */
-       rev = read_pci_config_byte(0, 0, 0, PCI_CLASS_REVISION);
+       pci_read_config_byte(dev, PCI_CLASS_REVISION, &rev);
        if (rev > 0x9)
                return;
 
        printk(KERN_INFO "Intel E7520/7320/7525 detected.");
 
-       /* enable access to config space */
-       config = read_pci_config_byte(0, 0, 0, 0xf4);
-       write_pci_config_byte(0, 0, 0, 0xf4, config|0x2);
+       /* enable access to config space*/
+       pci_read_config_byte(dev, 0xf4, &config);
+       pci_write_config_byte(dev, 0xf4, config|0x2);
 
        /* read xTPR register */
-       word = read_pci_config_16(0, 0, 0x40, 0x4c);
+       raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word);
 
        if (!(word & (1 << 13))) {
                printk(KERN_INFO "Disabling irq balancing and affinity\n");
@@ -50,25 +37,14 @@ void __init quirk_intel_irqbalance(void)
                noirqdebug_setup("");
 #ifdef CONFIG_PROC_FS
                no_irq_affinity = 1;
-#endif
-#ifdef CONFIG_HOTPLUG_CPU
-               printk(KERN_INFO "Disabling cpu hotplug control\n");
-               enable_cpu_hotplug = 0;
-#endif
-#ifdef CONFIG_X86_64
-               /* force the genapic selection to flat mode so that
-                * interrupts can be redirected to more than one CPU.
-                */
-               genapic_force = &apic_flat;
 #endif
        }
 
-       /* put back the original value for config space */
+       /* put back the original value for config space*/
        if (!(config & 0x2))
-               write_pci_config_byte(0, 0, 0, 0xf4, config);
+               pci_write_config_byte(dev, 0xf4, config);
 }
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,   PCI_DEVICE_ID_INTEL_E7320_MCH,  verify_quirk_intel_irqbalance);
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,   PCI_DEVICE_ID_INTEL_E7525_MCH,  verify_quirk_intel_irqbalance);
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,   PCI_DEVICE_ID_INTEL_E7520_MCH,  verify_quirk_intel_irqbalance);
-
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,   PCI_DEVICE_ID_INTEL_E7320_MCH,  quirk_intel_irqbalance);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,   PCI_DEVICE_ID_INTEL_E7525_MCH,  quirk_intel_irqbalance);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,   PCI_DEVICE_ID_INTEL_E7520_MCH,  quirk_intel_irqbalance);
 #endif