Merge master.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-rc-fixes-2.6

[linux-2.6-omap-h63xx.git] / arch / m32r / kernel / setup_oaks32r.c

diff --git a/arch/m32r/kernel/setup_oaks32r.c b/arch/m32r/kernel/setup_oaks32r.c
index 45add5b76f194de4bee539c70bfb1ec17379f91c..cd62598e3cea6b879062293ced0fcd7ec24726bd 100644 (file)
--- a/arch/m32r/kernel/setup_oaks32r.c
+++ b/arch/m32r/kernel/setup_oaks32r.c
@@ -7,7 +7,6 @@
  *                           Hitoshi Yamamoto, Mamoru Sakugawa
  */
 
-#include <linux/config.h>
 #include <linux/irq.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -18,12 +17,6 @@
 
 #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
 
-#ifndef CONFIG_SMP
-typedef struct {
-       unsigned long icucr;  /* ICU Control Register */
-} icu_data_t;
-#endif /* CONFIG_SMP */
-
 icu_data_t icu_data[NR_IRQS];
 
 static void disable_oaks32r_irq(unsigned int irq)
@@ -91,7 +84,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_NE2000
        /* INT3 : LAN controller (RTL8019AS) */
        irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT3].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_INT3].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_INT3].action = 0;
        irq_desc[M32R_IRQ_INT3].depth = 1;
        icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -100,7 +93,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -109,7 +102,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
        /* SIO0_R : uart receive data */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -117,7 +110,7 @@ void __init init_IRQ(void)
 
        /* SIO0_S : uart send data */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -125,7 +118,7 @@ void __init init_IRQ(void)
 
        /* SIO1_R : uart receive data */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -133,7 +126,7 @@ void __init init_IRQ(void)
 
        /* SIO1_S : uart send data */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;