]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/mips/dec/ecc-berr.c
bnx2: Handle DMA mapping errors.
[linux-2.6-omap-h63xx.git] / arch / mips / dec / ecc-berr.c
index 3e374d05978f0ede0b0b057348a99eb4f3c70c98..6a17c9b508eaa06dea5f66791e06e9f6f3d8dfc5 100644 (file)
@@ -18,7 +18,6 @@
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
-#include <linux/spinlock.h>
 #include <linux/types.h>
 
 #include <asm/addrspace.h>
@@ -26,6 +25,7 @@
 #include <asm/cpu.h>
 #include <asm/irq_regs.h>
 #include <asm/processor.h>
+#include <asm/ptrace.h>
 #include <asm/system.h>
 #include <asm/traps.h>
 
@@ -231,13 +231,10 @@ irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id)
 static inline void dec_kn02_be_init(void)
 {
        volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);
-       unsigned long flags;
 
        kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR);
        kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN);
 
-       spin_lock_irqsave(&kn02_lock, flags);
-
        /* Preset write-only bits of the Control Register cache. */
        cached_kn02_csr = *csr | KN02_CSR_LEDS;
 
@@ -247,8 +244,6 @@ static inline void dec_kn02_be_init(void)
        cached_kn02_csr |= KN02_CSR_CORRECT;
        *csr = cached_kn02_csr;
        iob();
-
-       spin_unlock_irqrestore(&kn02_lock, flags);
 }
 
 static inline void dec_kn03_be_init(void)
@@ -268,7 +263,7 @@ static inline void dec_kn03_be_init(void)
         */
        *mcr = (*mcr & ~(KN03_MCR_DIAGCHK | KN03_MCR_DIAGGEN)) |
               KN03_MCR_CORRECT;
-       if (current_cpu_data.cputype == CPU_R4400SC)
+       if (current_cpu_type() == CPU_R4400SC)
                *mbcs |= KN4K_MB_CSR_EE;
        fast_iob();
 }