ieee1394: merge from Linus

[linux-2.6-omap-h63xx.git] / arch / mips / kernel / genex.S

diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 04418b6568b0fda36ccc7cb784827d4ee7a3a7e2..37fda3dcdfc5b84bdbd57c785187ec3086b50ade 100644 (file)
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -8,11 +8,12 @@
  * Copyright (C) 2001 MIPS Technologies, Inc.
  * Copyright (C) 2002 Maciej W. Rozycki
  */
-#include <linux/config.h>
 #include <linux/init.h>
 
 #include <asm/asm.h>
+#include <asm/asmmacro.h>
 #include <asm/cacheops.h>
+#include <asm/irqflags.h>
 #include <asm/regdef.h>
 #include <asm/fpregdef.h>
 #include <asm/mipsregs.h>
@@ -128,6 +129,7 @@ handle_vcei:
 NESTED(handle_int, PT_SIZE, sp)
        SAVE_ALL
        CLI
+       TRACE_IRQS_OFF
 
        PTR_LA  ra, ret_from_irq
        move    a0, sp
@@ -171,6 +173,15 @@ NESTED(except_vec_vi, 0, sp)
        SAVE_AT
        .set    push
        .set    noreorder
+#ifdef CONFIG_MIPS_MT_SMTC
+       /*
+        * To keep from blindly blocking *all* interrupts
+        * during service by SMTC kernel, we also want to
+        * pass the IM value to be cleared.
+        */
+EXPORT(except_vec_vi_mori)
+       ori     a0, $0, 0
+#endif /* CONFIG_MIPS_MT_SMTC */
 EXPORT(except_vec_vi_lui)
        lui     v0, 0           /* Patched */
        j       except_vec_vi_handler
@@ -187,7 +198,27 @@ EXPORT(except_vec_vi_end)
 NESTED(except_vec_vi_handler, 0, sp)
        SAVE_TEMP
        SAVE_STATIC
+#ifdef CONFIG_MIPS_MT_SMTC
+       /*
+        * SMTC has an interesting problem that interrupts are level-triggered,
+        * and the CLI macro will clear EXL, potentially causing a duplicate
+        * interrupt service invocation. So we need to clear the associated
+        * IM bit of Status prior to doing CLI, and restore it after the
+        * service routine has been invoked - we must assume that the
+        * service routine will have cleared the state, and any active
+        * level represents a new or otherwised unserviced event...
+        */
+       mfc0    t1, CP0_STATUS
+       and     t0, a0, t1
+       mfc0    t2, CP0_TCCONTEXT
+       or      t0, t0, t2
+       mtc0    t0, CP0_TCCONTEXT
+       xor     t1, t1, t0
+       mtc0    t1, CP0_STATUS
+       _ehb
+#endif /* CONFIG_MIPS_MT_SMTC */
        CLI
+       TRACE_IRQS_OFF
        move    a0, sp
        jalr    v0
        j       ret_from_irq
@@ -260,11 +291,13 @@ NESTED(nmi_handler, PT_SIZE, sp)
        .endm
 
        .macro  __build_clear_sti
+       TRACE_IRQS_ON
        STI
        .endm
 
        .macro  __build_clear_cli
        CLI
+       TRACE_IRQS_OFF
        .endm
 
        .macro  __build_clear_fpe
@@ -272,6 +305,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
        li      a2, ~(0x3f << 12)
        and     a2, a1
        ctc1    a2, fcr31
+       TRACE_IRQS_ON
        STI
        .endm
 
@@ -337,7 +371,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
        BUILD_HANDLER mdmx mdmx sti silent              /* #22 */
        BUILD_HANDLER watch watch sti verbose           /* #23 */
        BUILD_HANDLER mcheck mcheck cli verbose         /* #24 */
-       BUILD_HANDLER mt mt sti verbose                 /* #25 */
+       BUILD_HANDLER mt mt sti silent                  /* #25 */
        BUILD_HANDLER dsp dsp sti silent                /* #26 */
        BUILD_HANDLER reserved reserved sti verbose     /* others */