* Kevin D. Kissell, kevink@mips.com and Carsten Langgard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*/
+#ifndef __ARCH_MIPS_MATH_EMU_IEEE754_H
+#define __ARCH_MIPS_MATH_EMU_IEEE754_H
#include <asm/byteorder.h>
#include <linux/types.h>
#define IEEE754_CLASS_INF 0x03
#define IEEE754_CLASS_SNAN 0x04
#define IEEE754_CLASS_QNAN 0x05
-extern const char *const ieee754_cname[];
/* exception numbers */
#define IEEE754_INEXACT 0x01
unsigned pad0:7;
#endif
};
-#define ieee754_csr (*(struct _ieee754_csr *)(¤t->thread.fpu.soft.fcr31))
+#define ieee754_csr (*(struct _ieee754_csr *)(¤t->thread.fpu.fcr31))
static inline unsigned ieee754_getrm(void)
{
/* compat */
#define ieee754dp_fix(x) ieee754dp_tint(x)
#define ieee754sp_fix(x) ieee754sp_tint(x)
+
+#endif /* __ARCH_MIPS_MATH_EMU_IEEE754_H */