Merge branch 'linus' into tracing/mmiotrace-mergefixups

[linux-2.6-omap-h63xx.git] / arch / mips / mm / c-tx39.c

diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index 560a6de9655620254234557674a080f897448189..a9f7f1f5e9b4ae90a50993bd06335b77ac8f47f5 100644 (file)
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -69,7 +69,7 @@ static void tx39h_dma_cache_wback_inv(unsigned long addr, unsigned long size)
 /* TX39H2,TX39H3 */
 static inline void tx39_blast_dcache_page(unsigned long addr)
 {
-       if (current_cpu_data.cputype != CPU_TX3912)
+       if (current_cpu_type() != CPU_TX3912)
                blast_dcache16_page(addr);
 }
 
@@ -122,6 +122,16 @@ static inline void tx39_blast_icache(void)
        local_irq_restore(flags);
 }
 
+static void tx39__flush_cache_vmap(void)
+{
+       tx39_blast_dcache();
+}
+
+static void tx39__flush_cache_vunmap(void)
+{
+       tx39_blast_dcache();
+}
+
 static inline void tx39_flush_cache_all(void)
 {
        if (!cpu_has_dc_aliases)
@@ -307,7 +317,7 @@ static __init void tx39_probe_cache(void)
                                  TX39_CONF_DCS_SHIFT));
 
        current_cpu_data.icache.linesz = 16;
-       switch (current_cpu_data.cputype) {
+       switch (current_cpu_type()) {
        case CPU_TX3912:
                current_cpu_data.icache.ways = 1;
                current_cpu_data.dcache.ways = 1;
@@ -329,7 +339,7 @@ static __init void tx39_probe_cache(void)
        }
 }
 
-void __init tx39_cache_init(void)
+void __cpuinit tx39_cache_init(void)
 {
        extern void build_clear_page(void);
        extern void build_copy_page(void);
@@ -341,9 +351,11 @@ void __init tx39_cache_init(void)
 
        tx39_probe_cache();
 
-       switch (current_cpu_data.cputype) {
+       switch (current_cpu_type()) {
        case CPU_TX3912:
                /* TX39/H core (writethru direct-map cache) */
+               __flush_cache_vmap      = tx39__flush_cache_vmap;
+               __flush_cache_vunmap    = tx39__flush_cache_vunmap;
                flush_cache_all = tx39h_flush_icache_all;
                __flush_cache_all       = tx39h_flush_icache_all;
                flush_cache_mm          = (void *) tx39h_flush_icache_all;
@@ -369,6 +381,9 @@ void __init tx39_cache_init(void)
                write_c0_wired(0);      /* set 8 on reset... */
                /* board-dependent init code may set WBON */
 
+               __flush_cache_vmap      = tx39__flush_cache_vmap;
+               __flush_cache_vunmap    = tx39__flush_cache_vunmap;
+
                flush_cache_all = tx39_flush_cache_all;
                __flush_cache_all = tx39___flush_cache_all;
                flush_cache_mm = tx39_flush_cache_mm;