* Macros for calculating offsets into config space given a device
* structure or dev/fun/reg
*/
-#define CFGOFFSET(bus,devfn,where) (((bus)<<16)+((devfn)<<8)+(where))
-#define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where)
+#define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where))
+#define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
static void *cfg_space;
int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
- This is b0rked.
- return dev->irq;
+ if (pin == 0)
+ return -1;
+
+ return K_BCM1480_INT_PCI_INTA - 1 + pin;
}
/* Do platform specific device initialization at pci_enable_device() time */
static struct resource bcm1480_mem_resource = {
.name = "BCM1480 PCI MEM",
- .start = 0x30000000UL,
- .end = 0x3fffffffUL,
+ .start = A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES,
+ .end = A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES + 0xfffffffUL,
.flags = IORESOURCE_MEM,
};
* XXX ehs: Should this happen in PCI Device mode?
*/
- set_io_port_base((unsigned long)
- ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536));
+ bcm1480_controller.io_map_base = (unsigned long)
+ ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536);
+ set_io_port_base(bcm1480_controller.io_map_base);
isa_slot_offset = (unsigned long)
ioremap(A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES, 1024*1024);
register_pci_controller(&bcm1480_controller);
#ifdef CONFIG_VGA_CONSOLE
- take_over_console(&vga_con,0,MAX_NR_CONSOLES-1,1);
+ take_over_console(&vga_con, 0, MAX_NR_CONSOLES-1, 1);
#endif
return 0;
}