Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

[linux-2.6-omap-h63xx.git] / arch / mips / sgi-ip22 / ip22-mc.c

diff --git a/arch/mips/sgi-ip22/ip22-mc.c b/arch/mips/sgi-ip22/ip22-mc.c
index ddb6506d8341e2b2b14a404fc349254f549dbd17..5268ac187bbdd27620426cc04ffcde8194e0d566 100644 (file)
--- a/arch/mips/sgi-ip22/ip22-mc.c
+++ b/arch/mips/sgi-ip22/ip22-mc.c
@@ -4,6 +4,7 @@
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu) - Indigo2 changes
  * Copyright (C) 2003 Ladislav Michl  (ladis@linux-mips.org)
+ * Copyright (C) 2004 Peter Fuerst    (pf@net.alphadv.de) - IP28
  */
 
 #include <linux/init.h>
@@ -47,7 +48,7 @@ struct mem {
 /*
  * Detect installed memory, do some sanity checks and notify kernel about it
  */
-static void probe_memory(void)
+static void __init probe_memory(void)
 {
        int i, j, found, cnt = 0;
        struct mem bank[4];
@@ -137,9 +138,12 @@ void __init sgimc_init(void)
        /* Step 2: Enable all parity checking in cpu control register
         *         zero.
         */
+       /* don't touch parity settings for IP28 */
+#ifndef CONFIG_SGI_IP28
        tmp = sgimc->cpuctrl0;
        tmp |= (SGIMC_CCTRL0_EPERRGIO | SGIMC_CCTRL0_EPERRMEM |
                SGIMC_CCTRL0_R4KNOCHKPARR);
+#endif
        sgimc->cpuctrl0 = tmp;
 
        /* Step 3: Setup the MC write buffer depth, this is controlled
@@ -204,4 +208,30 @@ void __init sgimc_init(void)
 void __init prom_meminit(void) {}
 void __init prom_free_prom_memory(void)
 {
+#ifdef CONFIG_SGI_IP28
+       u32 mconfig1;
+       unsigned long flags;
+       spinlock_t lock;
+
+       /*
+        * because ARCS accesses memory uncached we wait until ARCS
+        * isn't needed any longer, before we switch from slow to
+        * normal mode
+        */
+       spin_lock_irqsave(&lock, flags);
+       mconfig1 = sgimc->mconfig1;
+       /* map ECC register */
+       sgimc->mconfig1 = (mconfig1 & 0xffff0000) | 0x2060;
+       iob();
+       /* switch to normal mode */
+       *(unsigned long *)PHYS_TO_XKSEG_UNCACHED(0x60000000) = 0;
+       iob();
+       /* reduce WR_COL */
+       sgimc->cmacc = (sgimc->cmacc & ~0xf) | 4;
+       iob();
+       /* restore old config */
+       sgimc->mconfig1 = mconfig1;
+       iob();
+       spin_unlock_irqrestore(&lock, flags);
+#endif
 }