[MIPS] Cleanup memory barriers for weakly ordered systems.

[linux-2.6-omap-h63xx.git] / arch / mips / sgi-ip27 / ip27-timer.c

diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 04522faada96fdd3ae94914735e2bd45ec69c817..7d361726bbfb33ab0d2a8c15ba2b96a57e0337e0 100644 (file)
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -1,5 +1,5 @@
 /*
- * Copytight (C) 1999, 2000, 05 Ralf Baechle (ralf@linux-mips.org)
+ * Copytight (C) 1999, 2000, 05, 06 Ralf Baechle (ralf@linux-mips.org)
  * Copytight (C) 1999, 2000 Silicon Graphics, Inc.
  */
 #include <linux/bcd.h>
@@ -42,8 +42,6 @@
 static unsigned long ct_cur[NR_CPUS];  /* What counter should be at next timer irq */
 static long last_rtc_update;           /* Last time the rtc clock got updated */
 
-extern volatile unsigned long wall_jiffies;
-
 #if 0
 static int set_rtc_mmss(unsigned long nowtime)
 {
@@ -91,7 +89,7 @@ static int set_rtc_mmss(unsigned long nowtime)
 
 static unsigned int rt_timer_irq;
 
-void ip27_rt_timer_interrupt(struct pt_regs *regs)
+void ip27_rt_timer_interrupt(void)
 {
        int cpu = smp_processor_id();
        int cpuA = cputoslice(cpu) == 0;
@@ -111,9 +109,9 @@ again:
        kstat_this_cpu.irqs[irq]++;             /* kstat only for bootcpu? */
 
        if (cpu == 0)
-               do_timer(regs);
+               do_timer(1);
 
-       update_process_times(user_mode(regs));
+       update_process_times(user_mode(get_irq_regs()));
 
        /*
         * If we have an externally synchronized Linux clock, then update
@@ -136,13 +134,6 @@ again:
        irq_exit();
 }
 
-unsigned long ip27_do_gettimeoffset(void)
-{
-       unsigned long ct_cur1;
-       ct_cur1 = REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT) + CYCLES_PER_JIFFY;
-       return (ct_cur1 - ct_cur[0]) * NSEC_PER_CYCLE / 1000;
-}
-
 /* Includes for ioc3_init().  */
 #include <asm/sn/types.h>
 #include <asm/sn/sn0/addrs.h>
@@ -181,15 +172,6 @@ static __init unsigned long get_m48t35_time(void)
         return mktime(year, month, date, hour, min, sec);
 }
 
-static unsigned int startup_rt_irq(unsigned int irq)
-{
-       return 0;
-}
-
-static void shutdown_rt_irq(unsigned int irq)
-{
-}
-
 static void enable_rt_irq(unsigned int irq)
 {
 }
@@ -198,21 +180,17 @@ static void disable_rt_irq(unsigned int irq)
 {
 }
 
-static void mask_and_ack_rt(unsigned int irq)
-{
-}
-
 static void end_rt_irq(unsigned int irq)
 {
 }
 
 static struct irq_chip rt_irq_type = {
        .typename       = "SN HUB RT timer",
-       .startup        = startup_rt_irq,
-       .shutdown       = shutdown_rt_irq,
-       .enable         = enable_rt_irq,
-       .disable        = disable_rt_irq,
-       .ack            = mask_and_ack_rt,
+       .ack            = disable_rt_irq,
+       .mask           = disable_rt_irq,
+       .mask_ack       = disable_rt_irq,
+       .unmask         = enable_rt_irq,
+       .eoi            = enable_rt_irq,
        .end            = end_rt_irq,
 };
 
@@ -223,19 +201,14 @@ static struct irqaction rt_irqaction = {
        .name           = "timer"
 };
 
-extern int allocate_irqno(void);
-
-static void ip27_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
        int irqno  = allocate_irqno();
 
        if (irqno < 0)
                panic("Can't allocate interrupt number for timer interrupt");
 
-       irq_desc[irqno].status  = IRQ_DISABLED;
-       irq_desc[irqno].action  = NULL;
-       irq_desc[irqno].depth   = 1;
-       irq_desc[irqno].chip    = &rt_irq_type;
+       set_irq_chip_and_handler(irqno, &rt_irq_type, handle_percpu_irq);
 
        /* over-write the handler, we use our own way */
        irq->handler = no_action;
@@ -250,14 +223,17 @@ static void ip27_timer_setup(struct irqaction *irq)
        setup_irq(irqno, &rt_irqaction);
 }
 
+static cycle_t ip27_hpt_read(void)
+{
+       return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT);
+}
+
 void __init ip27_time_init(void)
 {
+       clocksource_mips.read = ip27_hpt_read;
+       mips_hpt_frequency = CYCLES_PER_SEC;
        xtime.tv_sec = get_m48t35_time();
        xtime.tv_nsec = 0;
-
-       do_gettimeoffset = ip27_do_gettimeoffset;
-
-       board_timer_setup = ip27_timer_setup;
 }
 
 void __init cpu_time_init(void)