[MIPS] Cleanup memory barriers for weakly ordered systems.

[linux-2.6-omap-h63xx.git] / arch / mips / sgi-ip27 / ip27-timer.c

diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 5e82a268e3c921abb2da0ced1687246e7aacc0b8..7d361726bbfb33ab0d2a8c15ba2b96a57e0337e0 100644 (file)
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -172,15 +172,6 @@ static __init unsigned long get_m48t35_time(void)
         return mktime(year, month, date, hour, min, sec);
 }
 
-static unsigned int startup_rt_irq(unsigned int irq)
-{
-       return 0;
-}
-
-static void shutdown_rt_irq(unsigned int irq)
-{
-}
-
 static void enable_rt_irq(unsigned int irq)
 {
 }
@@ -189,21 +180,17 @@ static void disable_rt_irq(unsigned int irq)
 {
 }
 
-static void mask_and_ack_rt(unsigned int irq)
-{
-}
-
 static void end_rt_irq(unsigned int irq)
 {
 }
 
 static struct irq_chip rt_irq_type = {
        .typename       = "SN HUB RT timer",
-       .startup        = startup_rt_irq,
-       .shutdown       = shutdown_rt_irq,
-       .enable         = enable_rt_irq,
-       .disable        = disable_rt_irq,
-       .ack            = mask_and_ack_rt,
+       .ack            = disable_rt_irq,
+       .mask           = disable_rt_irq,
+       .mask_ack       = disable_rt_irq,
+       .unmask         = enable_rt_irq,
+       .eoi            = enable_rt_irq,
        .end            = end_rt_irq,
 };
 
@@ -221,10 +208,7 @@ void __init plat_timer_setup(struct irqaction *irq)
        if (irqno < 0)
                panic("Can't allocate interrupt number for timer interrupt");
 
-       irq_desc[irqno].status  = IRQ_DISABLED;
-       irq_desc[irqno].action  = NULL;
-       irq_desc[irqno].depth   = 1;
-       irq_desc[irqno].chip    = &rt_irq_type;
+       set_irq_chip_and_handler(irqno, &rt_irq_type, handle_percpu_irq);
 
        /* over-write the handler, we use our own way */
        irq->handler = no_action;
@@ -239,14 +223,14 @@ void __init plat_timer_setup(struct irqaction *irq)
        setup_irq(irqno, &rt_irqaction);
 }
 
-static unsigned int ip27_hpt_read(void)
+static cycle_t ip27_hpt_read(void)
 {
        return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT);
 }
 
 void __init ip27_time_init(void)
 {
-       mips_hpt_read = ip27_hpt_read;
+       clocksource_mips.read = ip27_hpt_read;
        mips_hpt_frequency = CYCLES_PER_SEC;
        xtime.tv_sec = get_m48t35_time();
        xtime.tv_nsec = 0;