Merge branch 'for-linus' of git://git.kernel.dk/linux-2.6-block

[linux-2.6-omap-h63xx.git] / arch / mips / sibyte / sb1250 / time.c

diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index 2efffe15ff235783fe15365751a33f254686f01a..68337bf7a5aa6d0d5c9429032ed365e20ad272b8 100644 (file)
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -15,139 +15,13 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  */
+#include <linux/init.h>
 
-/*
- * These are routines to set up and handle interrupts from the
- * sb1250 general purpose timer 0.  We're using the timer as a
- * system clock, so we set it up to run at 100 Hz.  On every
- * interrupt, we update our idea of what the time of day is,
- * then call do_timer() in the architecture-independent kernel
- * code to do general bookkeeping (e.g. update jiffies, run
- * bottom halves, etc.)
- */
-#include <linux/interrupt.h>
-#include <linux/sched.h>
-#include <linux/spinlock.h>
-#include <linux/kernel_stat.h>
-
-#include <asm/irq.h>
-#include <asm/addrspace.h>
-#include <asm/time.h>
-#include <asm/io.h>
-
-#include <asm/sibyte/sb1250.h>
-#include <asm/sibyte/sb1250_regs.h>
-#include <asm/sibyte/sb1250_int.h>
-#include <asm/sibyte/sb1250_scd.h>
-
-
-#define IMR_IP2_VAL    K_INT_MAP_I0
-#define IMR_IP3_VAL    K_INT_MAP_I1
-#define IMR_IP4_VAL    K_INT_MAP_I2
-
-#define SB1250_HPT_NUM         3
-#define SB1250_HPT_VALUE       M_SCD_TIMER_CNT /* max value */
-
-
-extern int sb1250_steal_irq(int irq);
-
-static cycle_t sb1250_hpt_read(void);
-
-void __init sb1250_hpt_setup(void)
-{
-       int cpu = smp_processor_id();
-
-       if (!cpu) {
-               /* Setup hpt using timer #3 but do not enable irq for it */
-               __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG)));
-               __raw_writeq(SB1250_HPT_VALUE,
-                            IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_INIT)));
-               __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
-                            IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG)));
-
-               mips_hpt_frequency = V_SCD_TIMER_FREQ;
-               clocksource_mips.read = sb1250_hpt_read;
-               clocksource_mips.mask = M_SCD_TIMER_INIT;
-       }
-}
-
-
-void sb1250_time_init(void)
-{
-       int cpu = smp_processor_id();
-       int irq = K_INT_TIMER_0+cpu;
-
-       /* Only have 4 general purpose timers, and we use last one as hpt */
-       if (cpu > 2) {
-               BUG();
-       }
-
-       sb1250_mask_irq(cpu, irq);
-
-       /* Map the timer interrupt to ip[4] of this cpu */
-       __raw_writeq(IMR_IP4_VAL,
-                    IOADDR(A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE) +
-                           (irq << 3)));
-
-       /* the general purpose timer ticks at 1 Mhz independent if the rest of the system */
-       /* Disable the timer and set up the count */
-       __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
-#ifdef CONFIG_SIMULATION
-       __raw_writeq((50000 / HZ) - 1,
-                    IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
-#else
-       __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1,
-                    IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
-#endif
+extern void sb1250_clocksource_init(void);
+extern void sb1250_clockevent_init(void);
 
-       /* Set the timer running */
-       __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
-                    IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
-
-       sb1250_unmask_irq(cpu, irq);
-       sb1250_steal_irq(irq);
-       /*
-        * This interrupt is "special" in that it doesn't use the request_irq
-        * way to hook the irq line.  The timer interrupt is initialized early
-        * enough to make this a major pain, and it's also firing enough to
-        * warrant a bit of special case code.  sb1250_timer_interrupt is
-        * called directly from irq_handler.S when IP[4] is set during an
-        * interrupt
-        */
-}
-
-void sb1250_timer_interrupt(void)
+void __init plat_time_init(void)
 {
-       int cpu = smp_processor_id();
-       int irq = K_INT_TIMER_0 + cpu;
-
-       /* ACK interrupt */
-       ____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
-                      IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
-
-       if (cpu == 0) {
-               /*
-                * CPU 0 handles the global timer interrupt job
-                */
-               ll_timer_interrupt(irq);
-       }
-       else {
-               /*
-                * other CPUs should just do profiling and process accounting
-                */
-               ll_local_timer_interrupt(irq);
-       }
-}
-
-/*
- * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over
- * again.
- */
-static cycle_t sb1250_hpt_read(void)
-{
-       unsigned int count;
-
-       count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT))));
-
-       return SB1250_HPT_VALUE - count;
+       sb1250_clocksource_init();
+       sb1250_clockevent_init();
 }