]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/powerpc/boot/dts/mpc832x_mds.dts
[POWERPC] FSL: I2C device tree cleanups
[linux-2.6-omap-h63xx.git] / arch / powerpc / boot / dts / mpc832x_mds.dts
index 4fc0c4d34aa83361a9375b2334b8e891e8952b53..f866e81f93687079c2068d1a0931d0803a7dfbd4 100644 (file)
@@ -29,7 +29,6 @@
                        timebase-frequency = <0>;
                        bus-frequency = <0>;
                        clock-frequency = <0>;
-                       32-bit;
                };
        };
 
@@ -46,7 +45,6 @@
        soc8323@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00000200>;
                };
 
                i2c@3000 {
-                       device_type = "i2c";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       cell-index = <0>;
                        compatible = "fsl-i2c";
                        reg = <3000 100>;
                        interrupts = <e 8>;
                        interrupt-parent = < &ipic >;
                        dfsrr;
+
+                       rtc@68 {
+                               compatible = "dallas,ds1374";
+                               reg = <68>;
+                       };
                };
 
                serial@4500 {
                        descriptor-types-mask = <0122003f>;
                };
 
-               pci@8500 {
-                       interrupt-map-mask = <f800 0 0 7>;
-                       interrupt-map = <
-                                       /* IDSEL 0x11 AD17 */
-                                        8800 0 0 1 &ipic 14 8
-                                        8800 0 0 2 &ipic 15 8
-                                        8800 0 0 3 &ipic 16 8
-                                        8800 0 0 4 &ipic 17 8
-
-                                       /* IDSEL 0x12 AD18 */
-                                        9000 0 0 1 &ipic 16 8
-                                        9000 0 0 2 &ipic 17 8
-                                        9000 0 0 3 &ipic 14 8
-                                        9000 0 0 4 &ipic 15 8
-
-                                       /* IDSEL 0x13 AD19 */
-                                        9800 0 0 1 &ipic 17 8
-                                        9800 0 0 2 &ipic 14 8
-                                        9800 0 0 3 &ipic 15 8
-                                        9800 0 0 4 &ipic 16 8
-
-                                       /* IDSEL 0x15 AD21*/
-                                        a800 0 0 1 &ipic 14 8
-                                        a800 0 0 2 &ipic 15 8
-                                        a800 0 0 3 &ipic 16 8
-                                        a800 0 0 4 &ipic 17 8
-
-                                       /* IDSEL 0x16 AD22*/
-                                        b000 0 0 1 &ipic 17 8
-                                        b000 0 0 2 &ipic 14 8
-                                        b000 0 0 3 &ipic 15 8
-                                        b000 0 0 4 &ipic 16 8
-
-                                       /* IDSEL 0x17 AD23*/
-                                        b800 0 0 1 &ipic 16 8
-                                        b800 0 0 2 &ipic 17 8
-                                        b800 0 0 3 &ipic 14 8
-                                        b800 0 0 4 &ipic 15 8
-
-                                       /* IDSEL 0x18 AD24*/
-                                        c000 0 0 1 &ipic 15 8
-                                        c000 0 0 2 &ipic 16 8
-                                        c000 0 0 3 &ipic 17 8
-                                        c000 0 0 4 &ipic 14 8>;
-                       interrupt-parent = < &ipic >;
-                       interrupts = <42 8>;
-                       bus-range = <0 0>;
-                       ranges = <02000000 0 90000000 90000000 0 10000000
-                                 42000000 0 80000000 80000000 0 10000000
-                                 01000000 0 00000000 d0000000 0 00100000>;
-                       clock-frequency = <0>;
-                       #interrupt-cells = <1>;
-                       #size-cells = <2>;
-                       #address-cells = <3>;
-                       reg = <8500 100>;
-                       compatible = "83xx";
-                       device_type = "pci";
-               };
-
                ipic: pic@700 {
                        interrupt-controller;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <700 100>;
-                       built-in;
                        device_type = "ipic";
                };
-               
+
                par_io@1400 {
                        reg = <1400 100>;
                        device_type = "par_io";
                                        3  5  1  0  2  0  /* MDC */
                                        0  d  2  0  1  0        /* RX_CLK (CLK9) */
                                        3 18  2  0  1  0        /* TX_CLK (CLK10) */
-                                       1  1  1  0  1  0        /* TxD1 */
                                        1  0  1  0  1  0        /* TxD0 */
                                        1  1  1  0  1  0        /* TxD1 */
                                        1  2  1  0  1  0        /* TxD2 */
                reg = <e0100000 480>;
                brg-frequency = <0>;
                bus-frequency = <BCD3D80>;
-               
+
                muram@10000 {
                        device_type = "muram";
                        ranges = <0 00010000 00004000>;
-       
+
                        data-only@0 {
                                reg = <0 4000>;
                        };
                        compatible = "ucc_geth";
                        model = "UCC";
                        device-id = <4>;
-                       reg = <3000 200>;
+                       reg = <3200 200>;
                        interrupts = <23>;
                        interrupt-parent = < &qeic >;
                        /*
                        #address-cells = <0>;
                        #interrupt-cells = <1>;
                        reg = <80 80>;
-                       built-in;
                        big-endian;
                        interrupts = <20 8 21 8>; //high:32 low:33
                        interrupt-parent = < &ipic >;
                };
        };
+
+       pci@e0008500 {
+               interrupt-map-mask = <f800 0 0 7>;
+               interrupt-map = <
+                               /* IDSEL 0x11 AD17 */
+                                8800 0 0 1 &ipic 14 8
+                                8800 0 0 2 &ipic 15 8
+                                8800 0 0 3 &ipic 16 8
+                                8800 0 0 4 &ipic 17 8
+
+                               /* IDSEL 0x12 AD18 */
+                                9000 0 0 1 &ipic 16 8
+                                9000 0 0 2 &ipic 17 8
+                                9000 0 0 3 &ipic 14 8
+                                9000 0 0 4 &ipic 15 8
+
+                               /* IDSEL 0x13 AD19 */
+                                9800 0 0 1 &ipic 17 8
+                                9800 0 0 2 &ipic 14 8
+                                9800 0 0 3 &ipic 15 8
+                                9800 0 0 4 &ipic 16 8
+
+                               /* IDSEL 0x15 AD21*/
+                                a800 0 0 1 &ipic 14 8
+                                a800 0 0 2 &ipic 15 8
+                                a800 0 0 3 &ipic 16 8
+                                a800 0 0 4 &ipic 17 8
+
+                               /* IDSEL 0x16 AD22*/
+                                b000 0 0 1 &ipic 17 8
+                                b000 0 0 2 &ipic 14 8
+                                b000 0 0 3 &ipic 15 8
+                                b000 0 0 4 &ipic 16 8
+
+                               /* IDSEL 0x17 AD23*/
+                                b800 0 0 1 &ipic 16 8
+                                b800 0 0 2 &ipic 17 8
+                                b800 0 0 3 &ipic 14 8
+                                b800 0 0 4 &ipic 15 8
+
+                               /* IDSEL 0x18 AD24*/
+                                c000 0 0 1 &ipic 15 8
+                                c000 0 0 2 &ipic 16 8
+                                c000 0 0 3 &ipic 17 8
+                                c000 0 0 4 &ipic 14 8>;
+               interrupt-parent = < &ipic >;
+               interrupts = <42 8>;
+               bus-range = <0 0>;
+               ranges = <02000000 0 90000000 90000000 0 10000000
+                         42000000 0 80000000 80000000 0 10000000
+                         01000000 0 00000000 d0000000 0 00100000>;
+               clock-frequency = <0>;
+               #interrupt-cells = <1>;
+               #size-cells = <2>;
+               #address-cells = <3>;
+               reg = <e0008500 100>;
+               compatible = "fsl,mpc8349-pci";
+               device_type = "pci";
+       };
 };