powerpc/83xx: Add PCI-E support for all MPC83xx boards with PCI-E

[linux-2.6-omap-h63xx.git] / arch / powerpc / boot / dts / mpc8378_mds.dts

diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index 67a08d2e2ff254fff684ecfc550cd73e680f0318..6bbee4989fbe29a065dbafde7531a80ce4d92ae9 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -23,6 +23,8 @@
                serial0 = &serial0;
                serial1 = &serial1;
                pci0 = &pci0;
+               pci1 = &pci1;
+               pci2 = &pci2;
        };
 
        cpus {
@@ -232,8 +234,25 @@
                                reg = <0x3>;
                                device_type = "ethernet-phy";
                        };
+                       tbi0: tbi-phy@11 {
+                               reg = <0x11>;
+                               device_type = "tbi-phy";
+                       };
+               };
+
+               mdio@25520 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "fsl,gianfar-tbi";
+                       reg = <0x25520 0x20>;
+
+                       tbi1: tbi-phy@11 {
+                               reg = <0x11>;
+                               device_type = "tbi-phy";
+                       };
                };
 
+
                enet0: ethernet@24000 {
                        cell-index = <0>;
                        device_type = "network";
@@ -244,6 +263,7 @@
                        interrupts = <32 0x8 33 0x8 34 0x8>;
                        phy-connection-type = "mii";
                        interrupt-parent = <&ipic>;
+                       tbi-handle = <&tbi0>;
                        phy-handle = <&phy2>;
                };
 
@@ -257,6 +277,7 @@
                        interrupts = <35 0x8 36 0x8 37 0x8>;
                        phy-connection-type = "mii";
                        interrupt-parent = <&ipic>;
+                       tbi-handle = <&tbi1>;
                        phy-handle = <&phy3>;
                };
 
@@ -376,4 +397,66 @@
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
+
+       pci1: pcie@e0009000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe0009000 0x00001000>;
+               ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 1 8
+                                0 0 0 2 &ipic 1 8
+                                0 0 0 3 &ipic 1 8
+                                0 0 0 4 &ipic 1 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xa8000000
+                                 0x02000000 0 0xa8000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
+
+       pci2: pcie@e000a000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe000a000 0x00001000>;
+               ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 2 8
+                                0 0 0 2 &ipic 2 8
+                                0 0 0 3 &ipic 2 8
+                                0 0 0 4 &ipic 2 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xc8000000
+                                 0x02000000 0 0xc8000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
 };