powerpc/83xx: Add FSL eSDHC support for MPC837x-RDB boards

[linux-2.6-omap-h63xx.git] / arch / powerpc / boot / dts / mpc8378_rdb.dts

diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index b11e68f56a0612d302ce61bee6d2c56f03f01f3b..37c8555cc8d45337f7bfa929aba1b27153c01384 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -22,6 +22,8 @@
                serial0 = &serial0;
                serial1 = &serial1;
                pci0 = &pci0;
+               pci1 = &pci1;
+               pci2 = &pci2;
        };
 
        cpus {
@@ -107,6 +109,24 @@
                        reg = <0x200 0x100>;
                };
 
+               gpio1: gpio-controller@c00 {
+                       #gpio-cells = <2>;
+                       compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio";
+                       reg = <0xc00 0x100>;
+                       interrupts = <74 0x8>;
+                       interrupt-parent = <&ipic>;
+                       gpio-controller;
+               };
+
+               gpio2: gpio-controller@d00 {
+                       #gpio-cells = <2>;
+                       compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio";
+                       reg = <0xd00 0x100>;
+                       interrupts = <75 0x8>;
+                       interrupt-parent = <&ipic>;
+                       gpio-controller;
+               };
+
                i2c@3000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -116,8 +136,18 @@
                        interrupts = <14 0x8>;
                        interrupt-parent = <&ipic>;
                        dfsrr;
+
+                       dtt@48 {
+                               compatible = "national,lm75";
+                               reg = <0x48>;
+                       };
+
+                       at24@50 {
+                               compatible = "at24,24c256";
+                               reg = <0x50>;
+                       };
+
                        rtc@68 {
-                               device_type = "rtc";
                                compatible = "dallas,ds1339";
                                reg = <0x68>;
                        };
@@ -211,8 +241,25 @@
                                reg = <0x2>;
                                device_type = "ethernet-phy";
                        };
+                       tbi0: tbi-phy@11 {
+                               reg = <0x11>;
+                               device_type = "tbi-phy";
+                       };
+               };
+
+               mdio@25520 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "fsl,gianfar-tbi";
+                       reg = <0x25520 0x20>;
+
+                       tbi1: tbi-phy@11 {
+                               reg = <0x11>;
+                               device_type = "tbi-phy";
+                       };
                };
 
+
                enet0: ethernet@24000 {
                        cell-index = <0>;
                        device_type = "network";
@@ -271,6 +318,15 @@
                        fsl,descriptor-types-mask = <0x3ab0ebf>;
                };
 
+               sdhci@2e000 {
+                       compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+                       reg = <0x2e000 0x1000>;
+                       interrupts = <42 0x8>;
+                       interrupt-parent = <&ipic>;
+                       /* Filled in by U-Boot */
+                       clock-frequency = <0>;
+               };
+
                /* IPIC
                 * interrupts cell = <intr #, sense>
                 * sense values match linux IORESOURCE_IRQ_* defines:
@@ -318,4 +374,66 @@
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
+
+       pci1: pcie@e0009000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe0009000 0x00001000>;
+               ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 1 8
+                                0 0 0 2 &ipic 1 8
+                                0 0 0 3 &ipic 1 8
+                                0 0 0 4 &ipic 1 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xa8000000
+                                 0x02000000 0 0xa8000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
+
+       pci2: pcie@e000a000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe000a000 0x00001000>;
+               ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 2 8
+                                0 0 0 2 &ipic 2 8
+                                0 0 0 3 &ipic 2 8
+                                0 0 0 4 &ipic 2 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xc8000000
+                                 0x02000000 0 0xc8000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
 };