reg = <0x200 0x100>;
};
+ gpio1: gpio-controller@c00 {
+ #gpio-cells = <2>;
+ compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
+ reg = <0xc00 0x100>;
+ interrupts = <74 0x8>;
+ interrupt-parent = <&ipic>;
+ gpio-controller;
+ };
+
+ gpio2: gpio-controller@d00 {
+ #gpio-cells = <2>;
+ compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
+ reg = <0xd00 0x100>;
+ interrupts = <75 0x8>;
+ interrupt-parent = <&ipic>;
+ gpio-controller;
+ };
+
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
+
+ dtt@48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ };
+
+ at24@50 {
+ compatible = "at24,24c256";
+ reg = <0x50>;
+ };
+
rtc@68 {
- device_type = "rtc";
compatible = "dallas,ds1339";
reg = <0x68>;
};
reg = <0x2>;
device_type = "ethernet-phy";
};
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ mdio@25520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x25520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
};
enet0: ethernet@24000 {
interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
interrupt-parent = <&ipic>;
+ tbi-handle = <&tbi0>;
phy-handle = <&phy2>;
};
phy-connection-type = "mii";
interrupt-parent = <&ipic>;
fixed-link = <1 1 1000 0 0>;
+ tbi-handle = <&tbi1>;
};
serial0: serial@4500 {
fsl,descriptor-types-mask = <0x3ab0ebf>;
};
+ sdhci@2e000 {
+ compatible = "fsl,mpc8379-esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
+ /* Filled in by U-Boot */
+ clock-frequency = <0>;
+ };
+
sata@18000 {
compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
reg = <0x18000 0x1000>;