Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6

[linux-2.6-omap-h63xx.git] / arch / powerpc / boot / dts / tqm8541.dts

diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index 11bdb0fe50f4cf9e1c0548744cff69c71f64d349..d76441ec5dc72f1599ced341d2356062538da9b5 100644 (file)
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -12,8 +12,8 @@
 /dts-v1/;
 
 / {
-       model = "tqm,8541";
-       compatible = "tqm,8541", "tqm,85xx";
+       model = "tqc,tqm8541";
+       compatible = "tqc,tqm8541";
        #address-cells = <1>;
        #size-cells = <1>;
 
@@ -39,6 +39,7 @@
                        timebase-frequency = <0>;
                        bus-frequency = <0>;
                        clock-frequency = <0>;
+                       next-level-cache = <&L2>;
                };
        };
 
@@ -47,7 +48,7 @@
                reg = <0x00000000 0x10000000>;
        };
 
-       soc8541@e0000000 {
+       soc@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
                device_type = "soc";
@@ -63,7 +64,7 @@
                        interrupts = <18 2>;
                };
 
-               l2-cache-controller@20000 {
+               L2: l2-cache-controller@20000 {
                        compatible = "fsl,8540-l2-cache-controller";
                        reg = <0x20000 0x1000>;
                        cache-line-size = <32>;
@@ -88,6 +89,47 @@
                        };
                };
 
+               dma@21300 {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma";
+                       reg = <0x21300 0x4>;
+                       ranges = <0x0 0x21100 0x200>;
+                       cell-index = <0>;
+                       dma-channel@0 {
+                               compatible = "fsl,mpc8541-dma-channel",
+                                               "fsl,eloplus-dma-channel";
+                               reg = <0x0 0x80>;
+                               cell-index = <0>;
+                               interrupt-parent = <&mpic>;
+                               interrupts = <20 2>;
+                       };
+                       dma-channel@80 {
+                               compatible = "fsl,mpc8541-dma-channel",
+                                               "fsl,eloplus-dma-channel";
+                               reg = <0x80 0x80>;
+                               cell-index = <1>;
+                               interrupt-parent = <&mpic>;
+                               interrupts = <21 2>;
+                       };
+                       dma-channel@100 {
+                               compatible = "fsl,mpc8541-dma-channel",
+                                               "fsl,eloplus-dma-channel";
+                               reg = <0x100 0x80>;
+                               cell-index = <2>;
+                               interrupt-parent = <&mpic>;
+                               interrupts = <22 2>;
+                       };
+                       dma-channel@180 {
+                               compatible = "fsl,mpc8541-dma-channel",
+                                               "fsl,eloplus-dma-channel";
+                               reg = <0x180 0x80>;
+                               cell-index = <3>;
+                               interrupt-parent = <&mpic>;
+                               interrupts = <23 2>;
+                       };
+               };
+
                mdio@24520 {
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -158,12 +200,24 @@
                        interrupt-parent = <&mpic>;
                };
 
+               crypto@30000 {
+                       compatible = "fsl,sec2.0";
+                       reg = <0x30000 0x10000>;
+                       interrupts = <45 2>;
+                       interrupt-parent = <&mpic>;
+                       fsl,num-channels = <4>;
+                       fsl,channel-fifo-len = <24>;
+                       fsl,exec-units-mask = <0x7e>;
+                       fsl,descriptor-types-mask = <0x01010ebf>;
+               };
+
                mpic: pic@40000 {
                        interrupt-controller;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <0x40000 0x40000>;
                        device_type = "open-pic";
+                       compatible = "chrp,open-pic";
                };
 
                cpm@919c0 {