#size-cells = <1>;
model = "ibm,walnut";
compatible = "ibm,walnut";
- dcr-parent = <&/cpus/PowerPC,405GP@0>;
+ dcr-parent = <&/cpus/cpu@0>;
+
+ aliases {
+ ethernet0 = &EMAC;
+ serial0 = &UART0;
+ serial1 = &UART1;
+ };
cpus {
#address-cells = <1>;
#size-cells = <0>;
- PowerPC,405GP@0 {
+ cpu@0 {
device_type = "cpu";
+ model = "PowerPC,405GP";
reg = <0>;
clock-frequency = <bebc200>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
MAL: mcmal {
compatible = "ibm,mcmal-405gp", "ibm,mcmal";
dcr-reg = <180 62>;
- num-tx-chans = <2>;
+ num-tx-chans = <1>;
num-rx-chans = <1>;
interrupt-parent = <&UIC0>;
- interrupts = <a 4 b 4 c 4 d 4 e 4>;
+ interrupts = <
+ b 4 /* TXEOB */
+ c 4 /* RXEOB */
+ a 4 /* SERR */
+ d 4 /* TXDE */
+ e 4 /* RXDE */>;
};
POB0: opb {
};
EMAC: ethernet@ef600800 {
- linux,network-index = <0>;
device_type = "network";
compatible = "ibm,emac-405gp", "ibm,emac";
interrupt-parent = <&UIC0>;
- interrupts = <9 4 f 4>;
+ interrupts = <
+ f 4 /* Ethernet */
+ 9 4 /* Ethernet Wake Up */>;
+ local-mac-address = [000000000000]; /* Filled in by zImage */
reg = <ef600800 70>;
mal-device = <&MAL>;
- mal-tx-channel = <0 1>;
+ mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
};
};
- ds1743@1,0 {
+ nvram@1,0 {
/* NVRAM and RTC */
- compatible = "ds1743";
+ compatible = "ds1743-nvram";
+ #bytes = <2000>;
reg = <1 0 2000>;
};
virtual-reg = <f0300005>;
};
};
+
+ PCI0: pci@ec000000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
+ primary;
+ reg = <eec00000 8 /* Config space access */
+ eed80000 4 /* IACK */
+ eed80000 4 /* Special cycle */
+ ef480000 40>; /* Internal registers */
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed. Chip supports a second
+ * IO range but we don't use it for now
+ */
+ ranges = <02000000 0 80000000 80000000 0 20000000
+ 01000000 0 00000000 e8000000 0 00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <42000000 0 0 0 0 80000000>;
+
+ /* Walnut has all 4 IRQ pins tied together per slot */
+ interrupt-map-mask = <f800 0 0 0>;
+ interrupt-map = <
+ /* IDSEL 1 */
+ 0800 0 0 0 &UIC0 1c 8
+
+ /* IDSEL 2 */
+ 1000 0 0 0 &UIC0 1d 8
+
+ /* IDSEL 3 */
+ 1800 0 0 0 &UIC0 1e 8
+
+ /* IDSEL 4 */
+ 2000 0 0 0 &UIC0 1f 8
+ >;
+ };
};
chosen {