Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland...

[linux-2.6-omap-h63xx.git] / arch / powerpc / platforms / pasemi / iommu.c

diff --git a/arch/powerpc/platforms/pasemi/iommu.c b/arch/powerpc/platforms/pasemi/iommu.c
index 6c42787fb38263659c0c43824ee60a5cf374402e..86967bdd8774db20ae04d13fb7f4b65c80482192 100644 (file)
--- a/arch/powerpc/platforms/pasemi/iommu.c
+++ b/arch/powerpc/platforms/pasemi/iommu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2005-2007, PA Semi, Inc
+ * Copyright (C) 2005-2008, PA Semi, Inc
  *
  * Maintained by: Olof Johansson <olof@lixom.net>
  *
@@ -25,7 +25,7 @@
 #include <asm/iommu.h>
 #include <asm/machdep.h>
 #include <asm/abs_addr.h>
-
+#include <asm/firmware.h>
 
 #define IOBMAP_PAGE_SHIFT      12
 #define IOBMAP_PAGE_SIZE       (1 << IOBMAP_PAGE_SHIFT)
@@ -34,13 +34,13 @@
 #define IOB_BASE               0xe0000000
 #define IOB_SIZE               0x3000
 /* Configuration registers */
-#define IOBCAP_REG             0x10
-#define IOBCOM_REG             0x40
+#define IOBCAP_REG             0x40
+#define IOBCOM_REG             0x100
 /* Enable IOB address translation */
 #define IOBCOM_ATEN            0x00000100
 
 /* Address decode configuration register */
-#define IOB_AD_REG             0x53
+#define IOB_AD_REG             0x14c
 /* IOBCOM_AD_REG fields */
 #define IOB_AD_VGPRT           0x00000e00
 #define IOB_AD_VGAEN           0x00000100
@@ -55,13 +55,13 @@
 #define IOB_AD_TRNG_2G         0x00000001
 #define IOB_AD_TRNG_128G       0x00000003
 
-#define IOB_TABLEBASE_REG      0x55
+#define IOB_TABLEBASE_REG      0x154
 
 /* Base of the 64 4-byte L1 registers */
-#define IOB_XLT_L1_REGBASE     0xac0
+#define IOB_XLT_L1_REGBASE     0x2b00
 
 /* Register to invalidate TLB entries */
-#define IOB_AT_INVAL_TLB_REG   0xb40
+#define IOB_AT_INVAL_TLB_REG   0x2d00
 
 /* The top two bits of the level 1 entry contains valid and type flags */
 #define IOBMAP_L1E_V           0x40000000
@@ -75,7 +75,7 @@
 #define IOBMAP_L2E_V           0x80000000
 #define IOBMAP_L2E_V_CACHED    0xc0000000
 
-static u32 __iomem *iob;
+static void __iomem *iob;
 static u32 iob_l1_emptyval;
 static u32 iob_l2_emptyval;
 static u32 *iob_l2_base;
@@ -175,13 +175,19 @@ static void pci_dma_dev_setup_pasemi(struct pci_dev *dev)
 {
        pr_debug("pci_dma_dev_setup, dev %p (%s)\n", dev, pci_name(dev));
 
-       /* DMA device is untranslated, but all other PCI-e goes through
-        * the IOMMU
+#if !defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE)
+       /* For non-LPAR environment, don't translate anything for the DMA
+        * engine. The exception to this is if the user has enabled
+        * CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE at build time.
         */
-       if (dev->vendor == 0x1959 && dev->device == 0xa007)
+       if (dev->vendor == 0x1959 && dev->device == 0xa007 &&
+           !firmware_has_feature(FW_FEATURE_LPAR)) {
                dev->dev.archdata.dma_ops = &dma_direct_ops;
-       else
-               dev->dev.archdata.dma_data = &iommu_table_iobmap;
+               return;
+       }
+#endif
+
+       dev->dev.archdata.dma_data = &iommu_table_iobmap;
 }
 
 static void pci_dma_bus_setup_null(struct pci_bus *b) { }
@@ -212,7 +218,7 @@ int __init iob_init(struct device_node *dn)
        for (i = 0; i < 64; i++) {
                /* Each L1 covers 32MB, i.e. 8K entries = 32K of ram */
                regword = IOBMAP_L1E_V | (__pa(iob_l2_base + i*0x2000) >> 12);
-               out_le32(iob+IOB_XLT_L1_REGBASE+i, regword);
+               out_le32(iob+IOB_XLT_L1_REGBASE+i*4, regword);
        }
 
        /* set 2GB translation window, based at 0 */