Merge branch 'linus' into x86/signal

[linux-2.6-omap-h63xx.git] / arch / powerpc / sysdev / fsl_rio.c

diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 935822a25030c8efce5825d424a420f8f82996a7..a0fa4ebb39c62b2b2a569bcf03204cde7db0e1b6 100644 (file)
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -64,13 +64,13 @@
 #define DOORBELL_DSR_TE                0x00000080
 #define DOORBELL_DSR_QFI       0x00000010
 #define DOORBELL_DSR_DIQI      0x00000001
-#define DOORBELL_TID_OFFSET    0x03
-#define DOORBELL_SID_OFFSET    0x05
+#define DOORBELL_TID_OFFSET    0x02
+#define DOORBELL_SID_OFFSET    0x04
 #define DOORBELL_INFO_OFFSET   0x06
 
 #define DOORBELL_MESSAGE_SIZE  0x08
-#define DBELL_SID(x)           (*(u8 *)(x + DOORBELL_SID_OFFSET))
-#define DBELL_TID(x)           (*(u8 *)(x + DOORBELL_TID_OFFSET))
+#define DBELL_SID(x)           (*(u16 *)(x + DOORBELL_SID_OFFSET))
+#define DBELL_TID(x)           (*(u16 *)(x + DOORBELL_TID_OFFSET))
 #define DBELL_INF(x)           (*(u16 *)(x + DOORBELL_INFO_OFFSET))
 
 struct rio_atmu_regs {
@@ -176,6 +176,7 @@ struct rio_priv {
 
 /**
  * fsl_rio_doorbell_send - Send a MPC85xx doorbell message
+ * @mport: RapidIO master port info
  * @index: ID of RapidIO interface
  * @destid: Destination ID of target device
  * @data: 16-bit info field of RapidIO doorbell message
@@ -211,6 +212,7 @@ static int fsl_rio_doorbell_send(struct rio_mport *mport,
 
 /**
  * fsl_local_config_read - Generate a MPC85xx local config space read
+ * @mport: RapidIO master port info
  * @index: ID of RapdiIO interface
  * @offset: Offset into configuration space
  * @len: Length (in bytes) of the maintenance transaction
@@ -232,6 +234,7 @@ static int fsl_local_config_read(struct rio_mport *mport,
 
 /**
  * fsl_local_config_write - Generate a MPC85xx local config space write
+ * @mport: RapidIO master port info
  * @index: ID of RapdiIO interface
  * @offset: Offset into configuration space
  * @len: Length (in bytes) of the maintenance transaction
@@ -254,6 +257,7 @@ static int fsl_local_config_write(struct rio_mport *mport,
 
 /**
  * fsl_rio_config_read - Generate a MPC85xx read maintenance transaction
+ * @mport: RapidIO master port info
  * @index: ID of RapdiIO interface
  * @destid: Destination ID of transaction
  * @hopcount: Number of hops to target device
@@ -295,6 +299,7 @@ fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid,
 
 /**
  * fsl_rio_config_write - Generate a MPC85xx write maintenance transaction
+ * @mport: RapidIO master port info
  * @index: ID of RapdiIO interface
  * @destid: Destination ID of transaction
  * @hopcount: Number of hops to target device
@@ -942,9 +947,51 @@ static int fsl_rio_get_cmdline(char *s)
 
 __setup("riohdid=", fsl_rio_get_cmdline);
 
+static inline void fsl_rio_info(struct device *dev, u32 ccsr)
+{
+       const char *str;
+       if (ccsr & 1) {
+               /* Serial phy */
+               switch (ccsr >> 30) {
+               case 0:
+                       str = "1";
+                       break;
+               case 1:
+                       str = "4";
+                       break;
+               default:
+                       str = "Unknown";
+                       break;;
+               }
+               dev_info(dev, "Hardware port width: %s\n", str);
+
+               switch ((ccsr >> 27) & 7) {
+               case 0:
+                       str = "Single-lane 0";
+                       break;
+               case 1:
+                       str = "Single-lane 2";
+                       break;
+               case 2:
+                       str = "Four-lane";
+                       break;
+               default:
+                       str = "Unknown";
+                       break;
+               }
+               dev_info(dev, "Training connection status: %s\n", str);
+       } else {
+               /* Parallel phy */
+               if (!(ccsr & 0x80000000))
+                       dev_info(dev, "Output port operating in 8-bit mode\n");
+               if (!(ccsr & 0x08000000))
+                       dev_info(dev, "Input port operating in 8-bit mode\n");
+       }
+}
+
 /**
- * fsl_rio_setup - Setup MPC85xx RapidIO interface
- * @fsl_rio_setup - Setup Freescale PowerPC RapidIO interface
+ * fsl_rio_setup - Setup Freescale PowerPC RapidIO interface
+ * @dev: of_device pointer
  *
  * Initializes MPC85xx RapidIO hardware interface, configures
  * master port with system-specific info, and registers the
@@ -1055,6 +1102,35 @@ int fsl_rio_setup(struct of_device *dev)
                        (port->phy_type == RIO_PHY_PARALLEL) ? "parallel" :
                        ((port->phy_type == RIO_PHY_SERIAL) ? "serial" :
                         "unknown"));
+       /* Checking the port training status */
+       if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) {
+               dev_err(&dev->dev, "Port is not ready. "
+                                  "Try to restart connection...\n");
+               switch (port->phy_type) {
+               case RIO_PHY_SERIAL:
+                       /* Disable ports */
+                       out_be32(priv->regs_win + RIO_CCSR, 0);
+                       /* Set 1x lane */
+                       setbits32(priv->regs_win + RIO_CCSR, 0x02000000);
+                       /* Enable ports */
+                       setbits32(priv->regs_win + RIO_CCSR, 0x00600000);
+                       break;
+               case RIO_PHY_PARALLEL:
+                       /* Disable ports */
+                       out_be32(priv->regs_win + RIO_CCSR, 0x22000000);
+                       /* Enable ports */
+                       out_be32(priv->regs_win + RIO_CCSR, 0x44000000);
+                       break;
+               }
+               msleep(100);
+               if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) {
+                       dev_err(&dev->dev, "Port restart failed.\n");
+                       rc = -ENOLINK;
+                       goto err;
+               }
+               dev_info(&dev->dev, "Port restart success!\n");
+       }
+       fsl_rio_info(&dev->dev, ccsr);
 
        port->sys_size = (in_be32((priv->regs_win + RIO_PEF_CAR))
                                        & RIO_PEF_CTLS) >> 4;