[POWERPC] 4xx: Fix 4xx flush_tlb_page()

[linux-2.6-omap-h63xx.git] / arch / ppc / platforms / fads.h

diff --git a/arch/ppc/platforms/fads.h b/arch/ppc/platforms/fads.h
index b60c56450b67d695073c8891173f5b6f0cfcf00b..2f9f0f60e3f76139f80a5ca43246679e091a3db8 100644 (file)
--- a/arch/ppc/platforms/fads.h
+++ b/arch/ppc/platforms/fads.h
@@ -19,12 +19,13 @@
 #ifndef __ASM_FADS_H__
 #define __ASM_FADS_H__
 
-#include <linux/config.h>
 
 #include <asm/ppcboot.h>
 
 #if defined(CONFIG_MPC86XADS)
 
+#define BOARD_CHIP_NAME "MPC86X"
+
 /* U-Boot maps BCSR to 0xff080000 */
 #define BCSR_ADDR              ((uint)0xff080000)
 
@@ -110,7 +111,7 @@
 
 /* CPM Ethernet through SCC1 or SCC2 */
 
-#ifdef CONFIG_SCC1_ENET                /* Probably 860 variant */
+#if defined(CONFIG_SCC1_ENET) || defined(CONFIG_MPC8xx_SECOND_ETH_SCC1)                /* Probably 860 variant */
 /* Bits in parallel I/O port registers that have to be set/cleared
  * to configure the pins for SCC1 use.
  * TCLK - CLK1, RCLK - CLK2.