/*
- * arch/ppc/kernel/ibm440gx_common.c
- *
* PPC440GX system library
*
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003, 2004 Zultys Technologies
+ * Copyright (c) 2003 - 2006 Zultys Technologies
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* option) any later version.
*
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <asm/ibm44x.h>
/* Disable L2C on rev.A, rev.B and 800MHz version of rev.C,
enable it on all other revisions
*/
- if (strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. A") == 0 ||
- strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. B") == 0
- || (strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. C")
+ if (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. A") == 0 ||
+ strcmp(cur_cpu_spec->cpu_name, "440GX Rev. B") == 0
+ || (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C")
== 0 && p->cpu > 667000000))
ibm440gx_l2c_disable();
else
return 0;
}
+void __init ibm440gx_platform_init(unsigned long r3, unsigned long r4,
+ unsigned long r5, unsigned long r6,
+ unsigned long r7)
+{
+ /* Erratum 440_43 workaround, disable L1 cache parity checking */
+ if (!strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C") ||
+ !strcmp(cur_cpu_spec->cpu_name, "440GX Rev. F"))
+ mtspr(SPRN_CCR1, mfspr(SPRN_CCR1) | CCR1_DPC);
+
+ ibm44x_platform_init(r3, r4, r5, r6, r7);
+}