Merge branch 'master' of /home/trondmy/kernel/linux-2.6/

[linux-2.6-omap-h63xx.git] / arch / ppc / syslib / mv64x60.c

diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c
index 839f8872826f40480088397ddb9da28f716f1356..3b039c30a439adfc2b8168285bd5418f12738fff 100644 (file)
--- a/arch/ppc/syslib/mv64x60.c
+++ b/arch/ppc/syslib/mv64x60.c
@@ -1,6 +1,4 @@
 /*
- * arch/ppc/syslib/mv64x60.c
- *
  * Common routines for the Marvell/Galileo Discovery line of host bridges
  * (gt64260, mv64360, mv64460, ...).
  *
@@ -19,6 +17,7 @@
 #include <linux/string.h>
 #include <linux/spinlock.h>
 #include <linux/mv643xx.h>
+#include <linux/platform_device.h>
 
 #include <asm/byteorder.h>
 #include <asm/io.h>
@@ -34,7 +33,7 @@ u8 mv64x60_pci_exclude_bridge = 1;
 DEFINE_SPINLOCK(mv64x60_lock);
 
 static phys_addr_t     mv64x60_bridge_pbase;
-static void            *mv64x60_bridge_vbase;
+static void            __iomem *mv64x60_bridge_vbase;
 static u32             mv64x60_bridge_type = MV64x60_TYPE_INVALID;
 static u32             mv64x60_bridge_rev;
 #if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
@@ -312,7 +311,7 @@ static struct platform_device mpsc1_device = {
 };
 #endif
 
-#ifdef CONFIG_MV643XX_ETH
+#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
 static struct resource mv64x60_eth_shared_resources[] = {
        [0] = {
                .name   = "ethernet shared base",
@@ -455,7 +454,7 @@ static struct platform_device *mv64x60_pd_devs[] __initdata = {
        &mpsc0_device,
        &mpsc1_device,
 #endif
-#ifdef CONFIG_MV643XX_ETH
+#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
        &mv64x60_eth_shared_device,
 #endif
 #ifdef CONFIG_MV643XX_ETH_0
@@ -938,7 +937,7 @@ mv64x60_setup_for_chip(struct mv64x60_handle *bh)
  *
  * Return the virtual address of the bridge's registers.
  */
-void *
+void __iomem *
 mv64x60_get_bridge_vbase(void)
 {
        return mv64x60_bridge_vbase;
@@ -1304,7 +1303,7 @@ mv64x60_config_pci_params(struct pci_controller *hose,
        early_write_config_word(hose, 0, devfn, PCI_COMMAND, u16_val);
 
        /* Set latency timer, cache line size, clear BIST */
-       u16_val = (pi->latency_timer << 8) | (L1_CACHE_LINE_SIZE >> 2);
+       u16_val = (pi->latency_timer << 8) | (L1_CACHE_BYTES >> 2);
        early_write_config_word(hose, 0, devfn, PCI_CACHE_LINE_SIZE, u16_val);
 
        mv64x60_pci_exclude_bridge = save_exclude;