sh: fixup many sparse errors.

[linux-2.6-omap-h63xx.git] / arch / sh / kernel / traps_32.c

diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index baa4fa368dce2e14f164819cd396f5cf352c1c63..4901f673216210b5b5f26bf39fa7604a1c16377d 100644 (file)
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -25,6 +25,7 @@
 #include <linux/limits.h>
 #include <asm/system.h>
 #include <asm/uaccess.h>
+#include <asm/fpu.h>
 
 #ifdef CONFIG_SH_KGDB
 #include <asm/kgdb.h>
@@ -42,6 +43,7 @@
 # define TRAP_ILLEGAL_SLOT_INST        6
 # define TRAP_ADDRESS_ERROR    9
 # ifdef CONFIG_CPU_SH2A
+#  define TRAP_FPU_ERROR       13
 #  define TRAP_DIVZERO_ERROR   17
 #  define TRAP_DIVOVF_ERROR    18
 # endif
@@ -190,6 +192,7 @@ static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
        int ret, index, count;
        unsigned long *rm, *rn;
        unsigned char *src, *dst;
+       unsigned char __user *srcu, *dstu;
 
        index = (instruction>>8)&15;    /* 0x0F00 */
        rn = &regs->regs[index];
@@ -204,28 +207,28 @@ static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
        case 0: /* mov.[bwl] to/from memory via r0+rn */
                if (instruction & 8) {
                        /* from memory */
-                       src = (unsigned char*) *rm;
-                       src += regs->regs[0];
-                       dst = (unsigned char*) rn;
-                       *(unsigned long*)dst = 0;
+                       srcu = (unsigned char __user *)*rm;
+                       srcu += regs->regs[0];
+                       dst = (unsigned char *)rn;
+                       *(unsigned long *)dst = 0;
 
 #if !defined(__LITTLE_ENDIAN__)
                        dst += 4-count;
 #endif
-                       if (ma->from(dst, src, count))
+                       if (ma->from(dst, srcu, count))
                                goto fetch_fault;
 
                        sign_extend(count, dst);
                } else {
                        /* to memory */
-                       src = (unsigned char*) rm;
+                       src = (unsigned char *)rm;
 #if !defined(__LITTLE_ENDIAN__)
                        src += 4-count;
 #endif
-                       dst = (unsigned char*) *rn;
-                       dst += regs->regs[0];
+                       dstu = (unsigned char __user *)*rn;
+                       dstu += regs->regs[0];
 
-                       if (ma->to(dst, src, count))
+                       if (ma->to(dstu, src, count))
                                goto fetch_fault;
                }
                ret = 0;
@@ -233,10 +236,10 @@ static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
 
        case 1: /* mov.l Rm,@(disp,Rn) */
                src = (unsigned char*) rm;
-               dst = (unsigned char*) *rn;
-               dst += (instruction&0x000F)<<2;
+               dstu = (unsigned char __user *)*rn;
+               dstu += (instruction&0x000F)<<2;
 
-               if (ma->to(dst, src, 4))
+               if (ma->to(dstu, src, 4))
                        goto fetch_fault;
                ret = 0;
                break;
@@ -245,28 +248,28 @@ static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
                if (instruction & 4)
                        *rn -= count;
                src = (unsigned char*) rm;
-               dst = (unsigned char*) *rn;
+               dstu = (unsigned char __user *)*rn;
 #if !defined(__LITTLE_ENDIAN__)
                src += 4-count;
 #endif
-               if (ma->to(dst, src, count))
+               if (ma->to(dstu, src, count))
                        goto fetch_fault;
                ret = 0;
                break;
 
        case 5: /* mov.l @(disp,Rm),Rn */
-               src = (unsigned char*) *rm;
-               src += (instruction&0x000F)<<2;
-               dst = (unsigned char*) rn;
-               *(unsigned long*)dst = 0;
+               srcu = (unsigned char __user *)*rm;
+               srcu += (instruction & 0x000F) << 2;
+               dst = (unsigned char *)rn;
+               *(unsigned long *)dst = 0;
 
-               if (ma->from(dst, src, 4))
+               if (ma->from(dst, srcu, 4))
                        goto fetch_fault;
                ret = 0;
                break;
 
        case 6: /* mov.[bwl] from memory, possibly with post-increment */
-               src = (unsigned char*) *rm;
+               srcu = (unsigned char __user *)*rm;
                if (instruction & 4)
                        *rm += count;
                dst = (unsigned char*) rn;
@@ -275,7 +278,7 @@ static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
 #if !defined(__LITTLE_ENDIAN__)
                dst += 4-count;
 #endif
-               if (ma->from(dst, src, count))
+               if (ma->from(dst, srcu, count))
                        goto fetch_fault;
                sign_extend(count, dst);
                ret = 0;
@@ -284,28 +287,28 @@ static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
        case 8:
                switch ((instruction&0xFF00)>>8) {
                case 0x81: /* mov.w R0,@(disp,Rn) */
-                       src = (unsigned char*) &regs->regs[0];
+                       src = (unsigned char *) &regs->regs[0];
 #if !defined(__LITTLE_ENDIAN__)
                        src += 2;
 #endif
-                       dst = (unsigned char*) *rm; /* called Rn in the spec */
-                       dst += (instruction&0x000F)<<1;
+                       dstu = (unsigned char __user *)*rm; /* called Rn in the spec */
+                       dstu += (instruction & 0x000F) << 1;
 
-                       if (ma->to(dst, src, 2))
+                       if (ma->to(dstu, src, 2))
                                goto fetch_fault;
                        ret = 0;
                        break;
 
                case 0x85: /* mov.w @(disp,Rm),R0 */
-                       src = (unsigned char*) *rm;
-                       src += (instruction&0x000F)<<1;
-                       dst = (unsigned char*) &regs->regs[0];
-                       *(unsigned long*)dst = 0;
+                       srcu = (unsigned char __user *)*rm;
+                       srcu += (instruction & 0x000F) << 1;
+                       dst = (unsigned char *) &regs->regs[0];
+                       *(unsigned long *)dst = 0;
 
 #if !defined(__LITTLE_ENDIAN__)
                        dst += 2;
 #endif
-                       if (ma->from(dst, src, 2))
+                       if (ma->from(dst, srcu, 2))
                                goto fetch_fault;
                        sign_extend(2, dst);
                        ret = 0;
@@ -331,7 +334,8 @@ static inline int handle_delayslot(struct pt_regs *regs,
                                   struct mem_access *ma)
 {
        opcode_t instruction;
-       void *addr = (void *)(regs->pc + instruction_size(old_instruction));
+       void __user *addr = (void __user *)(regs->pc +
+               instruction_size(old_instruction));
 
        if (copy_from_user(&instruction, addr, sizeof(instruction))) {
                /* the instruction-fetch faulted */
@@ -557,7 +561,7 @@ asmlinkage void do_address_error(struct pt_regs *regs,
                }
 
                set_fs(USER_DS);
-               if (copy_from_user(&instruction, (void *)(regs->pc),
+               if (copy_from_user(&instruction, (void __user *)(regs->pc),
                                   sizeof(instruction))) {
                        /* Argh. Fault on the instruction itself.
                           This should never happen non-SMP
@@ -587,7 +591,7 @@ uspace_segv:
                        die("unaligned program counter", regs, error_code);
 
                set_fs(KERNEL_DS);
-               if (copy_from_user(&instruction, (void *)(regs->pc),
+               if (copy_from_user(&instruction, (void __user *)(regs->pc),
                                   sizeof(instruction))) {
                        /* Argh. Fault on the instruction itself.
                           This should never happen non-SMP
@@ -850,6 +854,9 @@ void __init trap_init(void)
 #ifdef CONFIG_CPU_SH2A
        set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error);
        set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error);
+#ifdef CONFIG_SH_FPU
+       set_exception_table_vec(TRAP_FPU_ERROR, fpu_error_trap_handler);
+#endif
 #endif
 
        /* Setup VBR for boot cpu */