]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/sh/kernel/traps_64.c
leds: Fix trigger registration race
[linux-2.6-omap-h63xx.git] / arch / sh / kernel / traps_64.c
index 0f4ea3ac3e0bec4125e75a8cae317f654c6d73ba..a85831cbf18ba6524968f8c3e7dfa6a1bc6025d9 100644 (file)
@@ -1,19 +1,13 @@
 /*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * arch/sh64/kernel/traps.c
+ * arch/sh/kernel/traps_64.c
  *
  * Copyright (C) 2000, 2001  Paolo Alberelli
  * Copyright (C) 2003, 2004  Paul Mundt
  * Copyright (C) 2003, 2004  Richard Curnow
  *
- */
-
-/*
- * 'Traps.c' handles hardware traps and faults after we have saved some
- * state in 'entry.S'.
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
  */
 #include <linux/sched.h>
 #include <linux/kernel.h>
@@ -36,6 +30,7 @@
 #include <asm/atomic.h>
 #include <asm/processor.h>
 #include <asm/pgtable.h>
+#include <asm/fpu.h>
 
 #undef DEBUG_EXCEPTION
 #ifdef DEBUG_EXCEPTION
@@ -244,7 +239,7 @@ DO_ERROR(12, SIGILL,  "reserved instruction", reserved_inst, current)
 /* Called with interrupts disabled */
 asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs)
 {
-       show_excp_regs(__FUNCTION__, -1, -1, regs);
+       show_excp_regs(__func__, -1, -1, regs);
        die_if_kernel("exception", regs, ex);
 }
 
@@ -618,7 +613,7 @@ static int misaligned_fpu_load(struct pt_regs *regs,
                   indexed by register number. */
                if (last_task_used_math == current) {
                        enable_fpu();
-                       fpsave(&current->thread.fpu.hard);
+                       save_fpu(current, regs);
                        disable_fpu();
                        last_task_used_math = NULL;
                        regs->sr |= SR_FD;
@@ -636,7 +631,7 @@ static int misaligned_fpu_load(struct pt_regs *regs,
                                current->thread.fpu.hard.fp_regs[destreg] = buflo;
                                current->thread.fpu.hard.fp_regs[destreg+1] = bufhi;
                        } else {
-#if defined(CONFIG_LITTLE_ENDIAN)
+#if defined(CONFIG_CPU_LITTLE_ENDIAN)
                                current->thread.fpu.hard.fp_regs[destreg] = bufhi;
                                current->thread.fpu.hard.fp_regs[destreg+1] = buflo;
 #else
@@ -691,7 +686,7 @@ static int misaligned_fpu_store(struct pt_regs *regs,
                   indexed by register number. */
                if (last_task_used_math == current) {
                        enable_fpu();
-                       fpsave(&current->thread.fpu.hard);
+                       save_fpu(current, regs);
                        disable_fpu();
                        last_task_used_math = NULL;
                        regs->sr |= SR_FD;
@@ -706,7 +701,7 @@ static int misaligned_fpu_store(struct pt_regs *regs,
                                buflo = current->thread.fpu.hard.fp_regs[srcreg];
                                bufhi = current->thread.fpu.hard.fp_regs[srcreg+1];
                        } else {
-#if defined(CONFIG_LITTLE_ENDIAN)
+#if defined(CONFIG_CPU_LITTLE_ENDIAN)
                                bufhi = current->thread.fpu.hard.fp_regs[srcreg];
                                buflo = current->thread.fpu.hard.fp_regs[srcreg+1];
 #else