Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland...

[linux-2.6-omap-h63xx.git] / arch / sparc / kernel / smp.c

diff --git a/arch/sparc/kernel/smp.c b/arch/sparc/kernel/smp.c
index 6b5f26b0fb75c5e716574a70122a79b675b62708..6724ab90f82bc6868f2c47eb81540d7909a2ade9 100644 (file)
--- a/arch/sparc/kernel/smp.c
+++ b/arch/sparc/kernel/smp.c
@@ -11,7 +11,6 @@
 #include <linux/sched.h>
 #include <linux/threads.h>
 #include <linux/smp.h>
-#include <linux/smp_lock.h>
 #include <linux/interrupt.h>
 #include <linux/kernel_stat.h>
 #include <linux/init.h>
@@ -34,6 +33,8 @@
 #include <asm/tlbflush.h>
 #include <asm/cpudata.h>
 
+#include "irq.h"
+
 int smp_num_cpus = 1;
 volatile unsigned long cpu_callin_map[NR_CPUS] __initdata = {0,};
 unsigned char boot_cpu_id = 0;
@@ -69,16 +70,6 @@ void __cpuinit smp_store_cpu_info(int id)
        cpu_data(id).prom_node = cpu_node;
        cpu_data(id).mid = cpu_get_hwmid(cpu_node);
 
-       /* this is required to tune the scheduler correctly */
-       /* is it possible to have CPUs with different cache sizes? */
-       if (id == boot_cpu_id) {
-               int cache_line,cache_nlines;
-               cache_line = 0x20;
-               cache_line = prom_getintdefault(cpu_node, "ecache-line-size", cache_line);
-               cache_nlines = 0x8000;
-               cache_nlines = prom_getintdefault(cpu_node, "ecache-nlines", cache_nlines);
-               max_cache_size = cache_line * cache_nlines;
-       }
        if (cpu_data(id).mid < 0)
                panic("No MID found for CPU%d at node 0x%08d", id, cpu_node);
 }