#define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
#define esr_disable (1)
-static inline int apic_id_registered(void)
+static inline int es7000_apic_id_registered(void)
{
- return (1);
+ return 1;
}
static inline const cpumask_t *target_cpus_cluster(void)
return &CPU_MASK_ALL;
}
-static inline const cpumask_t *target_cpus(void)
+static inline const cpumask_t *es7000_target_cpus(void)
{
return &cpumask_of_cpu(smp_processor_id());
}
#define NO_BALANCE_IRQ_CLUSTER (1)
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
-#define INT_DELIVERY_MODE (dest_Fixed)
-#define INT_DEST_MODE (0) /* phys delivery to target procs */
#define NO_BALANCE_IRQ (0)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL 0x0
printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
(apic_version[apic] == 0x14) ?
"Physical Cluster" : "Logical Cluster",
- nr_ioapics, cpus_addr(*target_cpus())[0]);
+ nr_ioapics, cpus_addr(*es7000_target_cpus())[0]);
}
static inline int multi_timer_check(int apic, int irq)