Merge branch 'sched/for-linus' into tracing/for-linus

[linux-2.6-omap-h63xx.git] / arch / x86 / kernel / amd_iommu_init.c

diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index c792ddc4fec62267b1539e0c9bafdfb144987d4c..2a13e430437dc5f1e05793aa995df4befcbc8938 100644 (file)
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -21,8 +21,10 @@
 #include <linux/acpi.h>
 #include <linux/gfp.h>
 #include <linux/list.h>
+#include <linux/sysdev.h>
 #include <asm/pci-direct.h>
 #include <asm/amd_iommu_types.h>
+#include <asm/amd_iommu.h>
 #include <asm/gart.h>
 
 /*
@@ -99,7 +101,7 @@ struct ivmd_header {
        u64 range_length;
 } __attribute__((packed));
 
-static int __initdata amd_iommu_disable;
+static int __initdata amd_iommu_detected;
 
 u16 amd_iommu_last_bdf;
 struct list_head amd_iommu_unity_map;
@@ -167,14 +169,11 @@ static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit)
 
 void __init iommu_enable(struct amd_iommu *iommu)
 {
-       u32 ctrl;
-
        printk(KERN_INFO "AMD IOMMU: Enabling IOMMU at ");
        print_devid(iommu->devid, 0);
        printk(" cap 0x%hx\n", iommu->cap_ptr);
 
        iommu_feature_enable(iommu, CONTROL_IOMMU_EN);
-       ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET);
 }
 
 static u8 * __init iommu_map_mmio_space(u64 address)
@@ -643,16 +642,55 @@ static int __init init_memory_definitions(struct acpi_table_header *table)
        return 0;
 }
 
+static void __init enable_iommus(void)
+{
+       struct amd_iommu *iommu;
+
+       list_for_each_entry(iommu, &amd_iommu_list, list) {
+               iommu_set_exclusion_range(iommu);
+               iommu_enable(iommu);
+       }
+}
+
+/*
+ * Suspend/Resume support
+ * disable suspend until real resume implemented
+ */
+
+static int amd_iommu_resume(struct sys_device *dev)
+{
+       return 0;
+}
+
+static int amd_iommu_suspend(struct sys_device *dev, pm_message_t state)
+{
+       return -EINVAL;
+}
+
+static struct sysdev_class amd_iommu_sysdev_class = {
+       .name = "amd_iommu",
+       .suspend = amd_iommu_suspend,
+       .resume = amd_iommu_resume,
+};
+
+static struct sys_device device_amd_iommu = {
+       .id = 0,
+       .cls = &amd_iommu_sysdev_class,
+};
+
 int __init amd_iommu_init(void)
 {
        int i, ret = 0;
 
 
-       if (amd_iommu_disable) {
+       if (no_iommu) {
                printk(KERN_INFO "AMD IOMMU disabled by kernel command line\n");
                return 0;
        }
 
+       if (!amd_iommu_detected)
+               return -ENODEV;
+
        /*
         * First parse ACPI tables to find the largest Bus/Dev/Func
         * we need to handle. Upon this information the shared data
@@ -730,6 +768,20 @@ int __init amd_iommu_init(void)
        if (acpi_table_parse("IVRS", init_memory_definitions) != 0)
                goto free;
 
+       ret = amd_iommu_init_dma_ops();
+       if (ret)
+               goto free;
+
+       ret = sysdev_class_register(&amd_iommu_sysdev_class);
+       if (ret)
+               goto free;
+
+       ret = sysdev_register(&device_amd_iommu);
+       if (ret)
+               goto free;
+
+       enable_iommus();
+
        printk(KERN_INFO "AMD IOMMU: aperture size is %d MB\n",
                        (1 << (amd_iommu_aperture_order-20)));
 
@@ -769,3 +821,55 @@ free:
        goto out;
 }
 
+static int __init early_amd_iommu_detect(struct acpi_table_header *table)
+{
+       return 0;
+}
+
+void __init amd_iommu_detect(void)
+{
+       if (swiotlb || no_iommu || iommu_detected)
+               return;
+
+       if (acpi_table_parse("IVRS", early_amd_iommu_detect) == 0) {
+               iommu_detected = 1;
+               amd_iommu_detected = 1;
+#ifdef CONFIG_GART_IOMMU
+               gart_iommu_aperture_disabled = 1;
+               gart_iommu_aperture = 0;
+#endif
+       }
+}
+
+static int __init parse_amd_iommu_options(char *str)
+{
+       for (; *str; ++str) {
+               if (strcmp(str, "isolate") == 0)
+                       amd_iommu_isolate = 1;
+       }
+
+       return 1;
+}
+
+static int __init parse_amd_iommu_size_options(char *str)
+{
+       for (; *str; ++str) {
+               if (strcmp(str, "32M") == 0)
+                       amd_iommu_aperture_order = 25;
+               if (strcmp(str, "64M") == 0)
+                       amd_iommu_aperture_order = 26;
+               if (strcmp(str, "128M") == 0)
+                       amd_iommu_aperture_order = 27;
+               if (strcmp(str, "256M") == 0)
+                       amd_iommu_aperture_order = 28;
+               if (strcmp(str, "512M") == 0)
+                       amd_iommu_aperture_order = 29;
+               if (strcmp(str, "1G") == 0)
+                       amd_iommu_aperture_order = 30;
+       }
+
+       return 1;
+}
+
+__setup("amd_iommu=", parse_amd_iommu_options);
+__setup("amd_iommu_size=", parse_amd_iommu_size_options);