Merge branch 'linus' into percpu-cpumask-x86-for-linus-2

[linux-2.6-omap-h63xx.git] / arch / x86 / kernel / cpu / addon_cpuid_features.c

diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 2cf23634b6d94d60e239d3f63cd9d4d21526b3fd..6882a735d9c0ad70b0c6386d11f53d5d50673d40 100644 (file)
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -7,7 +7,7 @@
 #include <asm/pat.h>
 #include <asm/processor.h>
 
-#include <mach_apic.h>
+#include <asm/apic.h>
 
 struct cpuid_bit {
        u16 feature;
@@ -69,7 +69,7 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
  */
 void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
 {
-#ifdef CONFIG_X86_SMP
+#ifdef CONFIG_SMP
        unsigned int eax, ebx, ecx, edx, sub_index;
        unsigned int ht_mask_width, core_plus_mask_width;
        unsigned int core_select_mask, core_level_siblings;
@@ -116,22 +116,14 @@ void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
 
        core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
 
-#ifdef CONFIG_X86_32
-       c->cpu_core_id = phys_pkg_id(c->initial_apicid, ht_mask_width)
+       c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, ht_mask_width)
                                                 & core_select_mask;
-       c->phys_proc_id = phys_pkg_id(c->initial_apicid, core_plus_mask_width);
+       c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, core_plus_mask_width);
        /*
         * Reinit the apicid, now that we have extended initial_apicid.
         */
-       c->apicid = phys_pkg_id(c->initial_apicid, 0);
-#else
-       c->cpu_core_id = phys_pkg_id(ht_mask_width) & core_select_mask;
-       c->phys_proc_id = phys_pkg_id(core_plus_mask_width);
-       /*
-        * Reinit the apicid, now that we have extended initial_apicid.
-        */
-       c->apicid = phys_pkg_id(0);
-#endif
+       c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
+
        c->x86_max_cores = (core_level_siblings / smp_num_siblings);
 
 
@@ -143,37 +135,3 @@ void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
        return;
 #endif
 }
-
-#ifdef CONFIG_X86_PAT
-void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
-{
-       if (!cpu_has_pat)
-               pat_disable("PAT not supported by CPU.");
-
-       switch (c->x86_vendor) {
-       case X86_VENDOR_INTEL:
-               /*
-                * There is a known erratum on Pentium III and Core Solo
-                * and Core Duo CPUs.
-                * " Page with PAT set to WC while associated MTRR is UC
-                *   may consolidate to UC "
-                * Because of this erratum, it is better to stick with
-                * setting WC in MTRR rather than using PAT on these CPUs.
-                *
-                * Enable PAT WC only on P4, Core 2 or later CPUs.
-                */
-               if (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 15))
-                       return;
-
-               pat_disable("PAT WC disabled due to known CPU erratum.");
-               return;
-
-       case X86_VENDOR_AMD:
-       case X86_VENDOR_CENTAUR:
-       case X86_VENDOR_TRANSMETA:
-               return;
-       }
-
-       pat_disable("PAT disabled. Not yet verified on this CPU type.");
-}
-#endif