Merge current mainline tree into linux-omap tree

[linux-2.6-omap-h63xx.git] / arch / x86 / kernel / cpu / addon_cpuid_features.c

diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index a6ef672adbbae01e8da2abb5bf2ae1cb32c091be..ef8f831af823a89530297919585e50c9a691e804 100644 (file)
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -7,6 +7,8 @@
 #include <asm/pat.h>
 #include <asm/processor.h>
 
+#include <mach_apic.h>
+
 struct cpuid_bit {
        u16 feature;
        u8 reg;
@@ -48,6 +50,92 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
        }
 }
 
+/* leaf 0xb SMT level */
+#define SMT_LEVEL      0
+
+/* leaf 0xb sub-leaf types */
+#define INVALID_TYPE   0
+#define SMT_TYPE       1
+#define CORE_TYPE      2
+
+#define LEAFB_SUBTYPE(ecx)             (((ecx) >> 8) & 0xff)
+#define BITS_SHIFT_NEXT_LEVEL(eax)     ((eax) & 0x1f)
+#define LEVEL_MAX_SIBLINGS(ebx)                ((ebx) & 0xffff)
+
+/*
+ * Check for extended topology enumeration cpuid leaf 0xb and if it
+ * exists, use it for populating initial_apicid and cpu topology
+ * detection.
+ */
+void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
+{
+#ifdef CONFIG_X86_SMP
+       unsigned int eax, ebx, ecx, edx, sub_index;
+       unsigned int ht_mask_width, core_plus_mask_width;
+       unsigned int core_select_mask, core_level_siblings;
+
+       if (c->cpuid_level < 0xb)
+               return;
+
+       cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
+
+       /*
+        * check if the cpuid leaf 0xb is actually implemented.
+        */
+       if (ebx == 0 || (LEAFB_SUBTYPE(ecx) != SMT_TYPE))
+               return;
+
+       set_cpu_cap(c, X86_FEATURE_XTOPOLOGY);
+
+       /*
+        * initial apic id, which also represents 32-bit extended x2apic id.
+        */
+       c->initial_apicid = edx;
+
+       /*
+        * Populate HT related information from sub-leaf level 0.
+        */
+       core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
+       core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
+
+       sub_index = 1;
+       do {
+               cpuid_count(0xb, sub_index, &eax, &ebx, &ecx, &edx);
+
+               /*
+                * Check for the Core type in the implemented sub leaves.
+                */
+               if (LEAFB_SUBTYPE(ecx) == CORE_TYPE) {
+                       core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
+                       core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
+                       break;
+               }
+
+               sub_index++;
+       } while (LEAFB_SUBTYPE(ecx) != INVALID_TYPE);
+
+       core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
+
+#ifdef CONFIG_X86_32
+       c->cpu_core_id = phys_pkg_id(c->initial_apicid, ht_mask_width)
+                                                & core_select_mask;
+       c->phys_proc_id = phys_pkg_id(c->initial_apicid, core_plus_mask_width);
+#else
+       c->cpu_core_id = phys_pkg_id(ht_mask_width) & core_select_mask;
+       c->phys_proc_id = phys_pkg_id(core_plus_mask_width);
+#endif
+       c->x86_max_cores = (core_level_siblings / smp_num_siblings);
+
+
+       printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
+              c->phys_proc_id);
+       if (c->x86_max_cores > 1)
+               printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
+                      c->cpu_core_id);
+       return;
+#endif
+}
+
 #ifdef CONFIG_X86_PAT
 void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
 {