Merge branch 'linus' into x86/kprobes

[linux-2.6-omap-h63xx.git] / arch / x86 / kernel / cpu / mtrr / state.c

diff --git a/arch/x86/kernel/cpu/mtrr/state.c b/arch/x86/kernel/cpu/mtrr/state.c
index 49e20c2afcdf7b4f4e24dc523315f7cb0a1970b0..7f7e2753685bce875ccd6dca8903474e366456cc 100644 (file)
--- a/arch/x86/kernel/cpu/mtrr/state.c
+++ b/arch/x86/kernel/cpu/mtrr/state.c
@@ -4,6 +4,7 @@
 #include <asm/mtrr.h>
 #include <asm/msr.h>
 #include <asm/processor-cyrix.h>
+#include <asm/processor-flags.h>
 #include "mtrr.h"
 
 
@@ -18,14 +19,16 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)
        if (use_intel() || is_cpu(CYRIX)) {
 
                /*  Save value of CR4 and clear Page Global Enable (bit 7)  */
-               if ( cpu_has_pge ) {
+               if (cpu_has_pge) {
                        ctxt->cr4val = read_cr4();
                        write_cr4(ctxt->cr4val & ~X86_CR4_PGE);
                }
 
-               /*  Disable and flush caches. Note that wbinvd flushes the TLBs as
-                   a side-effect  */
-               cr0 = read_cr0() | 0x40000000;
+               /*
+                * Disable and flush caches. Note that wbinvd flushes the TLBs
+                * as a side-effect
+                */
+               cr0 = read_cr0() | X86_CR0_CD;
                wbinvd();
                write_cr0(cr0);
                wbinvd();
@@ -41,7 +44,7 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)
 
 void set_mtrr_cache_disable(struct set_mtrr_context *ctxt)
 {
-       if (use_intel()) 
+       if (use_intel())
                /*  Disable MTRRs, and set the default type to uncached  */
                mtrr_wrmsr(MTRRdefType_MSR, ctxt->deftype_lo & 0xf300UL,
                      ctxt->deftype_hi);
@@ -65,12 +68,12 @@ void set_mtrr_done(struct set_mtrr_context *ctxt)
                else
                        /* Cyrix ARRs - everything else was excluded at the top */
                        setCx86(CX86_CCR3, ctxt->ccr3);
-               
+
                /*  Enable caches  */
                write_cr0(read_cr0() & 0xbfffffff);
 
                /*  Restore value of CR4  */
-               if ( cpu_has_pge )
+               if (cpu_has_pge)
                        write_cr4(ctxt->cr4val);
        }
        /*  Re-enable interrupts locally (if enabled previously)  */