*
* Authors: Nathan Williams <nathan@traverse.com.au>
* David Woodhouse <dwmw2@infradead.org>
+ * Treker Chen <treker@xrio.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
#include <linux/sysfs.h>
#include <linux/device.h>
#include <linux/kobject.h>
+#include <linux/firmware.h>
-#define VERSION "0.04"
+#define VERSION "0.07"
#define PTAG "solos-pci"
#define CONFIG_RAM_SIZE 128
#define IRQ_EN_ADDR 0x78
#define FPGA_VER 0x74
#define IRQ_CLEAR 0x70
-#define BUG_FLAG 0x6C
+#define WRITE_FLASH 0x6C
+#define PORTS 0x68
+#define FLASH_BLOCK 0x64
+#define FLASH_BUSY 0x60
+#define FPGA_MODE 0x5C
+#define FLASH_MODE 0x58
#define DATA_RAM_SIZE 32768
#define BUF_SIZE 4096
+#define FPGA_PAGE 528 /* FPGA flash page size*/
+#define SOLOS_PAGE 512 /* Solos flash page size*/
+#define FPGA_BLOCK (FPGA_PAGE * 8) /* FPGA flash block size*/
+#define SOLOS_BLOCK (SOLOS_PAGE * 8) /* Solos flash block size*/
#define RX_BUF(card, nr) ((card->buffers) + (nr)*BUF_SIZE*2)
#define TX_BUF(card, nr) ((card->buffers) + (nr)*BUF_SIZE*2 + BUF_SIZE)
static int debug = 0;
static int atmdebug = 0;
+static int firmware_upgrade = 0;
+static int fpga_upgrade = 0;
struct pkt_hdr {
__le16 size;
spinlock_t cli_queue_lock;
struct sk_buff_head tx_queue[4];
struct sk_buff_head cli_queue[4];
+ wait_queue_head_t fw_wq;
};
#define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data)
MODULE_LICENSE("GPL");
MODULE_PARM_DESC(debug, "Enable Loopback");
MODULE_PARM_DESC(atmdebug, "Print ATM data");
+MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade");
+MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade");
module_param(debug, int, 0444);
-module_param(atmdebug, int, 0444);
-
-static int opens;
+module_param(atmdebug, int, 0644);
+module_param(firmware_upgrade, int, 0444);
+module_param(fpga_upgrade, int, 0444);
static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
struct atm_vcc *vcc);
static DEVICE_ATTR(console, 0644, console_show, console_store);
+static int flash_upgrade(struct solos_card *card, int chip)
+{
+ const struct firmware *fw;
+ const char *fw_name;
+ uint32_t data32 = 0;
+ int blocksize = 0;
+ int numblocks = 0;
+ int offset;
+
+ if (chip == 0) {
+ fw_name = "solos-FPGA.bin";
+ blocksize = FPGA_BLOCK;
+ } else {
+ fw_name = "solos-Firmware.bin";
+ blocksize = SOLOS_BLOCK;
+ }
+
+ if (request_firmware(&fw, fw_name, &card->dev->dev))
+ return -ENOENT;
+
+ dev_info(&card->dev->dev, "Flash upgrade starting\n");
+
+ numblocks = fw->size / blocksize;
+ dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
+ dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
+
+ dev_info(&card->dev->dev, "Changing FPGA to Update mode\n");
+ iowrite32(1, card->config_regs + FPGA_MODE);
+ data32 = ioread32(card->config_regs + FPGA_MODE);
+
+ /* Set mode to Chip Erase */
+ dev_info(&card->dev->dev, "Set FPGA Flash mode to %s Chip Erase\n",
+ chip?"Solos":"FPGA");
+ iowrite32((chip * 2), card->config_regs + FLASH_MODE);
+
+
+ iowrite32(1, card->config_regs + WRITE_FLASH);
+ wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
+
+ for (offset = 0; offset < fw->size; offset += blocksize) {
+ int i;
+
+ /* Clear write flag */
+ iowrite32(0, card->config_regs + WRITE_FLASH);
+
+ /* Set mode to Block Write */
+ /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
+ iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
+
+ /* Copy block to buffer, swapping each 16 bits */
+ for(i = 0; i < blocksize; i += 4) {
+ uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
+ iowrite32(word, RX_BUF(card, 3) + i);
+ }
+
+ /* Specify block number and then trigger flash write */
+ iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK);
+ iowrite32(1, card->config_regs + WRITE_FLASH);
+ wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
+ }
+
+ release_firmware(fw);
+ iowrite32(0, card->config_regs + WRITE_FLASH);
+ iowrite32(0, card->config_regs + FPGA_MODE);
+ iowrite32(0, card->config_regs + FLASH_MODE);
+ dev_info(&card->dev->dev, "Returning FPGA to Data mode\n");
+ return 0;
+}
+
static irqreturn_t solos_irq(int irq, void *dev_id)
{
struct solos_card *card = dev_id;
//Disable IRQs from FPGA
iowrite32(0, card->config_regs + IRQ_EN_ADDR);
- /* If we only do it when the device is open, we lose console
- messages */
- if (1 || opens)
+ if (card->atmdev[0])
tasklet_schedule(&card->tlet);
+ else
+ wake_up(&card->fw_wq);
//Enable IRQs from FPGA
iowrite32(1, card->config_regs + IRQ_EN_ADDR);
}
header = (void *)skb_put(skb, sizeof(*header));
- header->size = cpu_to_le16(sizeof(*header));
+ header->size = cpu_to_le16(0);
header->vpi = cpu_to_le16(vcc->vpi);
header->vci = cpu_to_le16(vcc->vci);
header->type = cpu_to_le16(PKT_POPEN);
set_bit(ATM_VF_READY, &vcc->flags);
list_vccs(0);
- if (!opens)
- iowrite32(1, card->config_regs + IRQ_EN_ADDR);
-
- opens++; //count open PVCs
return 0;
}
}
header = (void *)skb_put(skb, sizeof(*header));
- header->size = cpu_to_le16(sizeof(*header));
+ header->size = cpu_to_le16(0);
header->vpi = cpu_to_le16(vcc->vpi);
header->vci = cpu_to_le16(vcc->vci);
header->type = cpu_to_le16(PKT_PCLOSE);
fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
// dev_dbg(&card->dev->dev, "Close for vpi %d and vci %d on interface %d\n", vcc->vpi, vcc->vci, SOLOS_CHAN(vcc->dev));
- if (!--opens)
- iowrite32(0, card->config_regs + IRQ_EN_ADDR);
clear_bit(ATM_VF_ADDR, &vcc->flags);
clear_bit(ATM_VF_READY, &vcc->flags);
struct solos_card *card = vcc->dev->dev_data;
struct sk_buff *skb2 = NULL;
struct pkt_hdr *header;
+ int pktlen;
//dev_dbg(&card->dev->dev, "psend called.\n");
//dev_dbg(&card->dev->dev, "dev,vpi,vci = %d,%d,%d\n",SOLOS_CHAN(vcc->dev),vcc->vpi,vcc->vci);
return 0;
}
- if (skb->len > (BUF_SIZE - sizeof(*header))) {
+ pktlen = skb->len;
+ if (pktlen > (BUF_SIZE - sizeof(*header))) {
dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n");
solos_pop(vcc, skb);
return 0;
ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC);
if (ret) {
+ dev_warn(&card->dev->dev, "pskb_expand_head failed.\n");
solos_pop(vcc, skb);
return ret;
}
header = (void *)skb_push(skb, sizeof(*header));
- header->size = cpu_to_le16(skb->len);
+ /* This does _not_ include the size of the header */
+ header->size = cpu_to_le16(pktlen);
header->vpi = cpu_to_le16(vcc->vpi);
header->vci = cpu_to_le16(vcc->vci);
header->type = cpu_to_le16(PKT_DATA);
return -ENOMEM;
card->dev = dev;
+ init_waitqueue_head(&card->fw_wq);
err = pci_enable_device(dev);
if (err) {
card->nr_ports = 2; /* FIXME: Detect daughterboard */
- err = atm_init(card);
- if (err)
- goto out_unmap_both;
-
pci_set_drvdata(dev, card);
+
tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
spin_lock_init(&card->tx_lock);
spin_lock_init(&card->tx_queue_lock);
spin_lock_init(&card->cli_queue_lock);
+
/*
// Set Loopback mode
data32 = 0x00010000;
//dev_dbg(&card->dev->dev, "Requesting IRQ: %d\n",dev->irq);
err = request_irq(dev->irq, solos_irq, IRQF_DISABLED|IRQF_SHARED,
"solos-pci", card);
- if (err)
+ if (err) {
dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq);
+ goto out_unmap_both;
+ }
// Enable IRQs
iowrite32(1, card->config_regs + IRQ_EN_ADDR);
+ if (fpga_upgrade)
+ flash_upgrade(card, 0);
+
+ if (firmware_upgrade)
+ flash_upgrade(card, 1);
+
+ err = atm_init(card);
+ if (err)
+ goto out_free_irq;
+
return 0;
+ out_free_irq:
+ iowrite32(0, card->config_regs + IRQ_EN_ADDR);
+ free_irq(dev->irq, card);
+ tasklet_kill(&card->tlet);
+
out_unmap_both:
+ pci_set_drvdata(dev, NULL);
pci_iounmap(dev, card->config_regs);
out_unmap_config:
pci_iounmap(dev, card->buffers);
{
int i;
- opens = 0;
-
for (i = 0; i < card->nr_ports; i++) {
skb_queue_head_init(&card->tx_queue[i]);
skb_queue_head_init(&card->cli_queue[i]);
projects / linux-2.6-omap-h63xx.git / blobdiff