#include <asm/dma.h>
#include <asm/ecard.h>
+#define DRV_NAME "icside"
+
#define ICS_IDENT_OFFSET 0x2280
#define ICS_ARCIN_V5_INTRSTAT 0x0000
unsigned int enabled;
void __iomem *irq_port;
void __iomem *ioc_base;
+ unsigned int sel;
unsigned int type;
- ide_hwif_t *hwif[2];
+ struct ide_host *host;
};
#define ICS_TYPE_A3IN 0
static void icside_maskproc(ide_drive_t *drive, int mask)
{
ide_hwif_t *hwif = HWIF(drive);
- struct icside_state *state = hwif->hwif_data;
+ struct expansion_card *ec = ECARD_DEV(hwif->dev);
+ struct icside_state *state = ecard_get_drvdata(ec);
unsigned long flags;
local_irq_save(flags);
{
ide_hwif_t *hwif = HWIF(drive);
struct expansion_card *ec = ECARD_DEV(hwif->dev);
+ struct icside_state *state = ecard_get_drvdata(ec);
struct request *rq = hwif->hwgroup->rq;
unsigned int dma_mode;
/*
* Route the DMA signals to the correct interface.
*/
- writeb(hwif->select_data, hwif->config_data);
+ writeb(state->sel | hwif->channel, state->ioc_base);
/*
* Select the correct timing for this drive.
static int icside_dma_test_irq(ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
- struct icside_state *state = hwif->hwif_data;
+ struct expansion_card *ec = ECARD_DEV(hwif->dev);
+ struct icside_state *state = ecard_get_drvdata(ec);
return readb(state->irq_port +
(hwif->channel ?
static void icside_dma_timeout(ide_drive_t *drive)
{
+ ide_hwif_t *hwif = drive->hwif;
+
printk(KERN_ERR "%s: DMA timeout occurred: ", drive->name);
if (icside_dma_test_irq(drive))
return;
- ide_dump_status(drive, "DMA timeout", ide_read_status(drive));
+ ide_dump_status(drive, "DMA timeout", hwif->tp_ops->read_status(hwif));
icside_dma_end(drive);
}
return -EOPNOTSUPP;
}
-static ide_hwif_t *
-icside_setup(void __iomem *base, struct cardinfo *info, struct expansion_card *ec)
+static void icside_setup_ports(hw_regs_t *hw, void __iomem *base,
+ struct cardinfo *info, struct expansion_card *ec)
{
unsigned long port = (unsigned long)base + info->dataoffset;
- ide_hwif_t *hwif;
-
- hwif = ide_find_port();
- if (hwif) {
- /*
- * Ensure we're using MMIO
- */
- default_hwif_mmiops(hwif);
-
- hwif->io_ports.data_addr = port;
- hwif->io_ports.error_addr = port + (1 << info->stepping);
- hwif->io_ports.nsect_addr = port + (2 << info->stepping);
- hwif->io_ports.lbal_addr = port + (3 << info->stepping);
- hwif->io_ports.lbam_addr = port + (4 << info->stepping);
- hwif->io_ports.lbah_addr = port + (5 << info->stepping);
- hwif->io_ports.device_addr = port + (6 << info->stepping);
- hwif->io_ports.status_addr = port + (7 << info->stepping);
- hwif->io_ports.ctl_addr =
- (unsigned long)base + info->ctrloffset;
- hwif->irq = ec->irq;
- hwif->chipset = ide_acorn;
- hwif->gendev.parent = &ec->dev;
- hwif->dev = &ec->dev;
- }
- return hwif;
+ hw->io_ports.data_addr = port;
+ hw->io_ports.error_addr = port + (1 << info->stepping);
+ hw->io_ports.nsect_addr = port + (2 << info->stepping);
+ hw->io_ports.lbal_addr = port + (3 << info->stepping);
+ hw->io_ports.lbam_addr = port + (4 << info->stepping);
+ hw->io_ports.lbah_addr = port + (5 << info->stepping);
+ hw->io_ports.device_addr = port + (6 << info->stepping);
+ hw->io_ports.status_addr = port + (7 << info->stepping);
+ hw->io_ports.ctl_addr = (unsigned long)base + info->ctrloffset;
+
+ hw->irq = ec->irq;
+ hw->dev = &ec->dev;
+ hw->chipset = ide_acorn;
}
static int __init
icside_register_v5(struct icside_state *state, struct expansion_card *ec)
{
- ide_hwif_t *hwif;
void __iomem *base;
- u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
+ struct ide_host *host;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0);
if (!base)
*/
icside_irqdisable_arcin_v5(ec, 0);
- hwif = icside_setup(base, &icside_cardinfo_v5, ec);
- if (!hwif)
+ icside_setup_ports(&hw, base, &icside_cardinfo_v5, ec);
+
+ host = ide_host_alloc(NULL, hws);
+ if (host == NULL)
return -ENODEV;
- state->hwif[0] = hwif;
+ state->host = host;
- idx[0] = hwif->index;
+ ecard_set_drvdata(ec, state);
- ide_device_add(idx, NULL);
+ ide_host_register(host, NULL, hws);
return 0;
}
static int __init
icside_register_v6(struct icside_state *state, struct expansion_card *ec)
{
- ide_hwif_t *hwif, *mate;
void __iomem *ioc_base, *easi_base;
+ struct ide_host *host;
unsigned int sel = 0;
int ret;
- u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
+ hw_regs_t hw[2], *hws[] = { &hw[0], NULL, NULL, NULL };
struct ide_port_info d = icside_v6_port_info;
ioc_base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
state->irq_port = easi_base;
state->ioc_base = ioc_base;
+ state->sel = sel;
/*
* Be on the safe side - disable interrupts
*/
icside_irqdisable_arcin_v6(ec, 0);
- /*
- * Find and register the interfaces.
- */
- hwif = icside_setup(easi_base, &icside_cardinfo_v6_1, ec);
- mate = icside_setup(easi_base, &icside_cardinfo_v6_2, ec);
-
- if (!hwif || !mate) {
- ret = -ENODEV;
- goto out;
- }
+ icside_setup_ports(&hw[0], easi_base, &icside_cardinfo_v6_1, ec);
+ icside_setup_ports(&hw[1], easi_base, &icside_cardinfo_v6_2, ec);
- state->hwif[0] = hwif;
- state->hwif[1] = mate;
+ host = ide_host_alloc(&d, hws);
+ if (host == NULL)
+ return -ENODEV;
- hwif->hwif_data = state;
- hwif->config_data = (unsigned long)ioc_base;
- hwif->select_data = sel;
+ state->host = host;
- mate->hwif_data = state;
- mate->config_data = (unsigned long)ioc_base;
- mate->select_data = sel | 1;
+ ecard_set_drvdata(ec, state);
- if (ec->dma != NO_DMA && !request_dma(ec->dma, hwif->name)) {
+ if (ec->dma != NO_DMA && !request_dma(ec->dma, DRV_NAME)) {
d.init_dma = icside_dma_init;
d.port_ops = &icside_v6_port_ops;
d.dma_ops = NULL;
}
- idx[0] = hwif->index;
- idx[1] = mate->index;
-
- ide_device_add(idx, &d);
+ ide_host_register(host, &d, hws);
return 0;
break;
}
- if (ret == 0) {
- ecard_set_drvdata(ec, state);
+ if (ret == 0)
goto out;
- }
kfree(state);
release:
projects / linux-2.6-omap-h63xx.git / blobdiff