u16 val16;
/* DMA Data Setup */
- t0 = (palm_bk3710_udmatimings[mode].cycletime + ide_palm_clk - 1)
- / ide_palm_clk - 1;
- tenv = (20 + ide_palm_clk - 1) / ide_palm_clk - 1;
- trp = (palm_bk3710_udmatimings[mode].rptime + ide_palm_clk - 1)
- / ide_palm_clk - 1;
+ t0 = DIV_ROUND_UP(palm_bk3710_udmatimings[mode].cycletime,
+ ide_palm_clk) - 1;
+ tenv = DIV_ROUND_UP(20, ide_palm_clk) - 1;
+ trp = DIV_ROUND_UP(palm_bk3710_udmatimings[mode].rptime,
+ ide_palm_clk) - 1;
/* udmatim Register */
val16 = readw(base + BK3710_UDMATIM) & (dev ? 0xFF0F : 0xFFF0);
cycletime = max_t(int, t->cycle, min_cycle);
/* DMA Data Setup */
- t0 = (cycletime + ide_palm_clk - 1) / ide_palm_clk;
- td = (t->active + ide_palm_clk - 1) / ide_palm_clk;
+ t0 = DIV_ROUND_UP(cycletime, ide_palm_clk);
+ td = DIV_ROUND_UP(t->active, ide_palm_clk);
tkw = t0 - td - 1;
td -= 1;
struct ide_timing *t;
/* PIO Data Setup */
- t0 = (cycletime + ide_palm_clk - 1) / ide_palm_clk;
- t2 = (ide_timing_find_mode(XFER_PIO_0 + mode)->active +
- ide_palm_clk - 1) / ide_palm_clk;
+ t0 = DIV_ROUND_UP(cycletime, ide_palm_clk);
+ t2 = DIV_ROUND_UP(ide_timing_find_mode(XFER_PIO_0 + mode)->active,
+ ide_palm_clk);
t2i = t0 - t2 - 1;
t2 -= 1;
/* TASKFILE Setup */
t = ide_timing_find_mode(XFER_PIO_0 + mode);
- t0 = (t->cyc8b + ide_palm_clk - 1) / ide_palm_clk;
- t2 = (t->act8b + ide_palm_clk - 1) / ide_palm_clk;
+ t0 = DIV_ROUND_UP(t->cyc8b, ide_palm_clk);
+ t2 = DIV_ROUND_UP(t->act8b, ide_palm_clk);
t2i = t0 - t2 - 1;
t2 -= 1;
palm_bk3710_setpiomode(base, NULL, 0, 600, 0);
palm_bk3710_setpiomode(base, NULL, 1, 600, 0);
}
+
+static u8 __devinit palm_bk3710_cable_detect(ide_hwif_t *hwif)
+{
+ return ATA_CBL_PATA80;
+}
+
+static int __devinit palm_bk3710_init_dma(ide_hwif_t *hwif,
+ const struct ide_port_info *d)
+{
+ unsigned long base =
+ hwif->io_ports.data_addr - IDE_PALM_ATA_PRI_REG_OFFSET;
+
+ printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name);
+
+ if (ide_allocate_dma_engine(hwif))
+ return -1;
+
+ ide_setup_dma(hwif, base);
+
+ return 0;
+}
+
+static const struct ide_port_ops palm_bk3710_ports_ops = {
+ .set_pio_mode = palm_bk3710_set_pio_mode,
+ .set_dma_mode = palm_bk3710_set_dma_mode,
+ .cable_detect = palm_bk3710_cable_detect,
+};
+
+static const struct ide_port_info __devinitdata palm_bk3710_port_info = {
+ .init_dma = palm_bk3710_init_dma,
+ .port_ops = &palm_bk3710_ports_ops,
+ .host_flags = IDE_HFLAG_MMIO,
+ .pio_mask = ATA_PIO4,
+ .udma_mask = ATA_UDMA4, /* (input clk 99MHz) */
+ .mwdma_mask = ATA_MWDMA2,
+};
+
static int __devinit palm_bk3710_probe(struct platform_device *pdev)
{
- hw_regs_t ide_ctlr_info;
- int index = 0;
- int pribase;
struct clk *clkp;
struct resource *mem, *irq;
ide_hwif_t *hwif;
- void __iomem *base;
+ unsigned long base;
+ int i;
+ hw_regs_t hw;
+ u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
clkp = clk_get(NULL, "IDECLK");
if (IS_ERR(clkp))
ide_palm_clk = clk_get_rate(ideclkp)/100000;
ide_palm_clk = (10000/ide_palm_clk) + 1;
/* Register the IDE interface with Linux ATA Interface */
- memset(&ide_ctlr_info, 0, sizeof(ide_ctlr_info));
+ memset(&hw, 0, sizeof(hw));
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (mem == NULL) {
printk(KERN_ERR "failed to get memory region resource\n");
return -ENODEV;
}
+
irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (irq == NULL) {
printk(KERN_ERR "failed to get IRQ resource\n");
return -ENODEV;
}
- base = (void *)mem->start;
+ if (request_mem_region(mem->start, mem->end - mem->start + 1,
+ "palm_bk3710") == NULL) {
+ printk(KERN_ERR "failed to request memory region\n");
+ return -EBUSY;
+ }
+
+ base = IO_ADDRESS(mem->start);
/* Configure the Palm Chip controller */
- palm_bk3710_chipinit(base);
-
- pribase = mem->start + IDE_PALM_ATA_PRI_REG_OFFSET;
- for (index = 0; index < IDE_NR_PORTS - 2; index++)
- ide_ctlr_info.io_ports[index] = pribase + index;
- ide_ctlr_info.io_ports[IDE_CONTROL_OFFSET] = mem->start +
- IDE_PALM_ATA_PRI_CTL_OFFSET;
- ide_ctlr_info.irq = irq->start;
- ide_ctlr_info.chipset = ide_palm3710;
-
- if (ide_register_hw(&ide_ctlr_info, NULL, &hwif) < 0) {
- printk(KERN_WARNING "Palm Chip BK3710 IDE Register Fail\n");
- return -ENODEV;
- }
+ palm_bk3710_chipinit((void __iomem *)base);
+
+ for (i = 0; i < IDE_NR_PORTS - 2; i++)
+ hw.io_ports_array[i] = base + IDE_PALM_ATA_PRI_REG_OFFSET + i;
+ hw.io_ports.ctl_addr = base + IDE_PALM_ATA_PRI_CTL_OFFSET;
+ hw.irq = irq->start;
+ hw.chipset = ide_palm3710;
+
+ hwif = ide_find_port();
+ if (hwif == NULL)
+ goto out;
+
+ i = hwif->index;
+
+ ide_init_port_data(hwif, i);
+ ide_init_port_hw(hwif, &hw);
- hwif->set_pio_mode = &palm_bk3710_set_pio_mode;
- hwif->set_dma_mode = &palm_bk3710_set_dma_mode;
hwif->mmio = 1;
default_hwif_mmiops(hwif);
- hwif->cbl = ATA_CBL_PATA80;
- hwif->ultra_mask = 0x1f; /* Ultra DMA Mode 4 Max
- (input clk 99MHz) */
- hwif->mwdma_mask = 0x7;
- hwif->drives[0].autotune = 1;
- hwif->drives[1].autotune = 1;
- ide_setup_dma(hwif, mem->start);
+ idx[0] = i;
+
+ ide_device_add(idx, &palm_bk3710_port_info);
return 0;
+out:
+ printk(KERN_WARNING "Palm Chip BK3710 IDE Register Fail\n");
+ return -ENODEV;
}
+/* work with hotplug and coldplug */
+MODULE_ALIAS("platform:palm_bk3710");
+
static struct platform_driver platform_bk_driver = {
.driver = {
.name = "palm_bk3710",
+ .owner = THIS_MODULE,
},
.probe = palm_bk3710_probe,
.remove = NULL,
module_init(palm_bk3710_init);
MODULE_LICENSE("GPL");
-