#define BK3710_IORDYTMP 0x78
#define BK3710_IORDYTMS 0x7C
-#include "../ide-timing.h"
-
static unsigned ideclk_period; /* in nanoseconds */
static const struct palm_bk3710_udmatiming palm_bk3710_udmatimings[6] = {
{125, 160}, /* UDMA Mode 1 */
{100, 120}, /* UDMA Mode 2 */
{100, 90}, /* UDMA Mode 3 */
- {85, 60}, /* UDMA Mode 4 */
+ {100, 60}, /* UDMA Mode 4 */
};
static void palm_bk3710_setudmamode(void __iomem *base, unsigned int dev,
static int __devinit palm_bk3710_init_dma(ide_hwif_t *hwif,
const struct ide_port_info *d)
{
- unsigned long base =
- hwif->io_ports.data_addr - IDE_PALM_ATA_PRI_REG_OFFSET;
-
printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name);
if (ide_allocate_dma_engine(hwif))
return -1;
- ide_setup_dma(hwif, base);
+ hwif->dma_base = hwif->io_ports.data_addr - IDE_PALM_ATA_PRI_REG_OFFSET;
+
+ hwif->dma_ops = &sff_dma_ops;
return 0;
}
ide_hwif_t *hwif;
unsigned long base, rate;
int i;
- hw_regs_t hw;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
clk = clk_get(NULL, "IDECLK");
i = hwif->index;
- ide_init_port_data(hwif, i);
- ide_init_port_hw(hwif, &hw);
-
- hwif->mmio = 1;
- default_hwif_mmiops(hwif);
-
idx[0] = i;
- ide_device_add(idx, &palm_bk3710_port_info);
+ ide_device_add(idx, &palm_bk3710_port_info, hws);
return 0;
out: