]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - drivers/ide/pci/siimage.c
pdc202xx_new: remove ->init_setup
[linux-2.6-omap-h63xx.git] / drivers / ide / pci / siimage.c
index 5d1e5e52a0447a02ebd481639fdd541b9cbc7912..faf0be31ba5704ddb8f5e7c350ba832f19b3cd1b 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * linux/drivers/ide/pci/siimage.c             Version 1.16    Jul 13 2007
+ * linux/drivers/ide/pci/siimage.c             Version 1.17    Oct 18 2007
  *
  * Copyright (C) 2001-2002     Andre Hedrick <andre@linux-ide.org>
  * Copyright (C) 2003          Red Hat <alan@redhat.com>
@@ -165,22 +165,22 @@ out:
 }
 
 /**
- *     sil_tune_pio    -       tune a drive
- *     @drive: drive to tune
- *     @pio: the desired PIO mode
+ *     sil_set_pio_mode        -       set host controller for PIO mode
+ *     @drive: drive
+ *     @pio: PIO mode number
  *
  *     Load the timing settings for this device mode into the
  *     controller. If we are in PIO mode 3 or 4 turn on IORDY
  *     monitoring (bit 9). The TF timing is bits 31:16
  */
 
-static void sil_tune_pio(ide_drive_t *drive, u8 pio)
+static void sil_set_pio_mode(ide_drive_t *drive, u8 pio)
 {
        const u16 tf_speed[]    = { 0x328a, 0x2283, 0x1281, 0x10c3, 0x10c1 };
        const u16 data_speed[]  = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 };
 
        ide_hwif_t *hwif        = HWIF(drive);
-       ide_drive_t *pair       = &hwif->drives[drive->dn ^ 1];
+       ide_drive_t *pair       = ide_get_paired_drive(drive);
        u32 speedt              = 0;
        u16 speedp              = 0;
        unsigned long addr      = siimage_seldev(drive, 0x04);
@@ -234,21 +234,15 @@ static void sil_tune_pio(ide_drive_t *drive, u8 pio)
        }
 }
 
-static void sil_set_pio_mode(ide_drive_t *drive, const u8 pio)
-{
-       sil_tune_pio(drive, pio);
-       (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
-}
-
 /**
- *     siimage_tune_chipset    -       set controller timings
- *     @drive: Drive to set up
- *     @speed: speed we want to achieve
+ *     sil_set_dma_mode        -       set host controller for DMA mode
+ *     @drive: drive
+ *     @speed: DMA mode
  *
- *     Tune the SII chipset for the desired mode.
+ *     Tune the SiI chipset for the desired DMA mode.
  */
 
-static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed)
+static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
 {
        u8 ultra6[]             = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 };
        u8 ultra5[]             = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 };
@@ -303,7 +297,7 @@ static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed)
                        mode |= ((unit) ? 0x30 : 0x03);
                        break;
                default:
-                       return 1;
+                       return;
        }
 
        if (hwif->mmio) {
@@ -315,28 +309,6 @@ static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed)
                pci_write_config_word(hwif->pci_dev, ma, multi);
                pci_write_config_word(hwif->pci_dev, ua, ultra);
        }
-       return (ide_config_drive_speed(drive, speed));
-}
-
-/**
- *     siimage_configure_drive_for_dma -       set up for DMA transfers
- *     @drive: drive we are going to set up
- *
- *     Set up the drive for DMA, tune the controller and drive as 
- *     required. If the drive isn't suitable for DMA or we hit
- *     other problems then we will drop down to PIO and set up
- *     PIO appropriately
- */
-static int siimage_config_drive_for_dma (ide_drive_t *drive)
-{
-       if (ide_tune_dma(drive))
-               return 0;
-
-       if (ide_use_fast_pio(drive))
-               ide_set_max_pio(drive);
-
-       return -1;
 }
 
 /* returns 1 if dma irq issued, 0 otherwise */
@@ -668,13 +640,9 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name)
 
 static unsigned int __devinit init_chipset_siimage(struct pci_dev *dev, const char *name)
 {
-       u32 class_rev   = 0;
-       u8 tmpbyte      = 0;
-       u8 BA5_EN       = 0;
+       u8 rev = dev->revision, tmpbyte = 0, BA5_EN = 0;
 
-        pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
-        class_rev &= 0xff;
-       pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, (class_rev) ? 1 : 255); 
+       pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, rev ? 1 : 255);
 
        pci_read_config_byte(dev, 0x8A, &BA5_EN);
        if ((BA5_EN & 0x01) || (pci_resource_start(dev, 5))) {
@@ -853,19 +821,14 @@ static void __devinit siimage_fixup(ide_hwif_t *hwif)
 
 static void __devinit init_iops_siimage(ide_hwif_t *hwif)
 {
-       struct pci_dev *dev     = hwif->pci_dev;
-       u32 class_rev           = 0;
-
-       pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
-       class_rev &= 0xff;
-       
        hwif->hwif_data = NULL;
 
        /* Pessimal until we finish probing */
        hwif->rqsize = 15;
 
-       if (pci_get_drvdata(dev) == NULL)
+       if (pci_get_drvdata(hwif->pci_dev) == NULL)
                return;
+
        init_mmio_iops_siimage(hwif);
 }
 
@@ -901,11 +864,9 @@ static u8 __devinit ata66_siimage(ide_hwif_t *hwif)
 
 static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
 {
-       hwif->autodma = 0;
-       
        hwif->resetproc = &siimage_reset;
-       hwif->speedproc = &siimage_tune_chipset;
        hwif->set_pio_mode = &sil_set_pio_mode;
+       hwif->set_dma_mode = &sil_set_dma_mode;
        hwif->reset_poll = &siimage_reset_poll;
        hwif->pre_reset = &siimage_pre_reset;
        hwif->udma_filter = &sil_udma_filter;
@@ -926,13 +887,8 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
        if (hwif->dma_base == 0)
                return;
 
-       hwif->ultra_mask = 0x7f;
-       hwif->mwdma_mask = 0x07;
-
-       if (!is_sata(hwif))
-               hwif->atapi_dma = 1;
-
-       hwif->ide_dma_check = &siimage_config_drive_for_dma;
+       if (is_sata(hwif))
+               hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
 
        if (hwif->cbl != ATA_CBL_PATA40_SHORT)
                hwif->cbl = ata66_siimage(hwif);
@@ -942,15 +898,6 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
        } else {
                hwif->ide_dma_test_irq = & siimage_io_ide_dma_test_irq;
        }
-       
-       /*
-        *      The BIOS often doesn't set up DMA on this controller
-        *      so we always do it.
-        */
-
-       hwif->autodma = 1;
-       hwif->drives[0].autodma = hwif->autodma;
-       hwif->drives[1].autodma = hwif->autodma;
 }
 
 #define DECLARE_SII_DEV(name_str)                      \
@@ -960,9 +907,10 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
                .init_iops      = init_iops_siimage,    \
                .init_hwif      = init_hwif_siimage,    \
                .fixup          = siimage_fixup,        \
-               .autodma        = AUTODMA,              \
-               .bootable       = ON_BOARD,             \
+               .host_flags     = IDE_HFLAG_BOOTABLE,   \
                .pio_mask       = ATA_PIO4,             \
+               .mwdma_mask     = ATA_MWDMA2,           \
+               .udma_mask      = ATA_UDMA6,            \
        }
 
 static ide_pci_device_t siimage_chipsets[] __devinitdata = {
@@ -985,11 +933,11 @@ static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_devi
        return ide_setup_pci_device(dev, &siimage_chipsets[id->driver_data]);
 }
 
-static struct pci_device_id siimage_pci_tbl[] = {
-       { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680,  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
+static const struct pci_device_id siimage_pci_tbl[] = {
+       { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_680),    0 },
 #ifdef CONFIG_BLK_DEV_IDE_SATA
-       { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
-       { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_1210SA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
+       { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_3112),   1 },
+       { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_1210SA), 2 },
 #endif
        { 0, },
 };