]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - drivers/infiniband/hw/ipath/ipath_intr.c
[PATCH] IB/ipath: print better debug info when handling 32/64-bit DMA mask problems
[linux-2.6-omap-h63xx.git] / drivers / infiniband / hw / ipath / ipath_intr.c
index 0bcb428041f32eb7fb2990ee9ae0610390fe201e..9004be32f3e6061cbcd4e9d67a88ff91a2b0641d 100644 (file)
@@ -1,4 +1,5 @@
 /*
+ * Copyright (c) 2006 QLogic, Inc. All rights reserved.
  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
  *
  * This software is available to you under a choice of one of two
@@ -397,7 +398,7 @@ static void handle_errors(struct ipath_devdata *dd, ipath_err_t errs)
                if ((dd->ipath_maskederrs & ~dd->ipath_ignorederrs) &
                    ~(INFINIPATH_E_RRCVEGRFULL | INFINIPATH_E_RRCVHDRFULL))
                        ipath_dev_err(dd, "Disabling error(s) %llx because "
-                                     "occuring too frequently (%s)\n",
+                                     "occurring too frequently (%s)\n",
                                      (unsigned long long)
                                      (dd->ipath_maskederrs &
                                       ~dd->ipath_ignorederrs), msg);
@@ -665,14 +666,14 @@ static void handle_layer_pioavail(struct ipath_devdata *dd)
 
        ret = __ipath_layer_intr(dd, IPATH_LAYER_INT_SEND_CONTINUE);
        if (ret > 0)
-               goto clear;
+               goto set;
 
        ret = __ipath_verbs_piobufavail(dd);
        if (ret > 0)
-               goto clear;
+               goto set;
 
        return;
-clear:
+set:
        set_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl);
        ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
                         dd->ipath_sendctrl);
@@ -719,11 +720,24 @@ static void handle_rcv(struct ipath_devdata *dd, u32 istat)
 irqreturn_t ipath_intr(int irq, void *data, struct pt_regs *regs)
 {
        struct ipath_devdata *dd = data;
-       u32 istat = ipath_read_kreg32(dd, dd->ipath_kregs->kr_intstatus);
+       u32 istat;
        ipath_err_t estat = 0;
        static unsigned unexpected = 0;
        irqreturn_t ret;
 
+       if(!(dd->ipath_flags & IPATH_PRESENT)) {
+               /* this is mostly so we don't try to touch the chip while
+                * it is being reset */
+               /*
+                * This return value is perhaps odd, but we do not want the
+                * interrupt core code to remove our interrupt handler
+                * because we don't appear to be handling an interrupt
+                * during a chip reset.
+                */
+               return IRQ_HANDLED;
+       }
+
+       istat = ipath_read_kreg32(dd, dd->ipath_kregs->kr_intstatus);
        if (unlikely(!istat)) {
                ipath_stats.sps_nullintr++;
                ret = IRQ_NONE; /* not our interrupt, or already handled */