]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - drivers/media/video/cx18/cx18-i2c.c
Merge git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6
[linux-2.6-omap-h63xx.git] / drivers / media / video / cx18 / cx18-i2c.c
index 6023ba3bd3a63d79d967fdbb86a2fa67611a391c..8941f58bed7f042ce5cce8a97bbfeb33ef20bd79 100644 (file)
@@ -4,6 +4,7 @@
  *  Derived from ivtv-i2c.c
  *
  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
+ *  Copyright (C) 2008  Andy Walls <awalls@radix.net>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
  */
 
 #include "cx18-driver.h"
+#include "cx18-io.h"
 #include "cx18-cards.h"
 #include "cx18-gpio.h"
 #include "cx18-av-core.h"
 #include "cx18-i2c.h"
-
-#include <media/ir-kbd-i2c.h>
+#include "cx18-irq.h"
 
 #define CX18_REG_I2C_1_WR   0xf15000
 #define CX18_REG_I2C_1_RD   0xf15008
@@ -158,12 +159,12 @@ static void cx18_setscl(void *data, int state)
        struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
        int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
        u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
-       u32 r = read_reg(addr);
+       u32 r = cx18_read_reg(cx, addr);
 
        if (state)
-               write_reg_sync(r | SETSCL_BIT, addr);
+               cx18_write_reg(cx, r | SETSCL_BIT, addr);
        else
-               write_reg_sync(r & ~SETSCL_BIT, addr);
+               cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
 }
 
 static void cx18_setsda(void *data, int state)
@@ -171,12 +172,12 @@ static void cx18_setsda(void *data, int state)
        struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
        int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
        u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
-       u32 r = read_reg(addr);
+       u32 r = cx18_read_reg(cx, addr);
 
        if (state)
-               write_reg_sync(r | SETSDL_BIT, addr);
+               cx18_write_reg(cx, r | SETSDL_BIT, addr);
        else
-               write_reg_sync(r & ~SETSDL_BIT, addr);
+               cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
 }
 
 static int cx18_getscl(void *data)
@@ -185,7 +186,7 @@ static int cx18_getscl(void *data)
        int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
        u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
 
-       return read_reg(addr) & GETSCL_BIT;
+       return cx18_read_reg(cx, addr) & GETSCL_BIT;
 }
 
 static int cx18_getsda(void *data)
@@ -194,7 +195,7 @@ static int cx18_getsda(void *data)
        int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
        u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
 
-       return read_reg(addr) & GETSDL_BIT;
+       return cx18_read_reg(cx, addr) & GETSDL_BIT;
 }
 
 /* template for i2c-bit-algo */
@@ -394,29 +395,36 @@ int init_cx18_i2c(struct cx18 *cx)
                cx->i2c_adap[i].dev.parent = &cx->dev->dev;
        }
 
-       if (read_reg(CX18_REG_I2C_2_WR) != 0x0003c02f) {
+       if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
                /* Reset/Unreset I2C hardware block */
-               write_reg(0x10000000, 0xc71004); /* Clock select 220MHz */
-               write_reg_sync(0x10001000, 0xc71024); /* Clock Enable */
+               /* Clock select 220MHz */
+               cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
+                                         0x00000000, 0x10001000);
+               /* Clock Enable */
+               cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
+                                         0x00001000, 0x10001000);
        }
        /* courtesy of Steven Toth <stoth@hauppauge.com> */
-       write_reg_sync(0x00c00000, 0xc7001c);
+       cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
        mdelay(10);
-       write_reg_sync(0x00c000c0, 0xc7001c);
+       cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
        mdelay(10);
-       write_reg_sync(0x00c00000, 0xc7001c);
+       cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
        mdelay(10);
 
-       write_reg_sync(0x00c00000, 0xc730c8); /* Set to edge-triggered intrs. */
-       write_reg_sync(0x00c00000, 0xc730c4); /* Clear any stale intrs */
+       /* Set to edge-triggered intrs. */
+       cx18_write_reg(cx, 0x00c00000, 0xc730c8);
+       /* Clear any stale intrs */
+       cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
+                      ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);
 
        /* Hw I2C1 Clock Freq ~100kHz */
-       write_reg_sync(0x00021c0f & ~4, CX18_REG_I2C_1_WR);
+       cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
        cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
        cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
 
        /* Hw I2C2 Clock Freq ~100kHz */
-       write_reg_sync(0x00021c0f & ~4, CX18_REG_I2C_2_WR);
+       cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
        cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
        cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
 
@@ -430,8 +438,10 @@ void exit_cx18_i2c(struct cx18 *cx)
 {
        int i;
        CX18_DEBUG_I2C("i2c exit\n");
-       write_reg(read_reg(CX18_REG_I2C_1_WR) | 4, CX18_REG_I2C_1_WR);
-       write_reg(read_reg(CX18_REG_I2C_2_WR) | 4, CX18_REG_I2C_2_WR);
+       cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
+                                                       CX18_REG_I2C_1_WR);
+       cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
+                                                       CX18_REG_I2C_2_WR);
 
        for (i = 0; i < 2; i++) {
                i2c_del_adapter(&cx->i2c_adap[i]);