Merge branch 'x86/cpu' into x86/core

[linux-2.6-omap-h63xx.git] / drivers / mfd / asic3.c

diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c
index eabf0bfccab4a0ca052ac290c26b0b193082df86..bc2a807f210df1804129f0de665c8b2cacde9614 100644 (file)
--- a/drivers/mfd/asic3.c
+++ b/drivers/mfd/asic3.c
@@ -16,7 +16,6 @@
  *
  */
 
-#include <linux/version.h>
 #include <linux/kernel.h>
 #include <linux/irq.h>
 #include <linux/gpio.h>
@@ -256,28 +255,28 @@ static int asic3_gpio_irq_type(unsigned int irq, unsigned int type)
                                      bank + ASIC3_GPIO_TRIGGER_TYPE);
        asic->irq_bothedge[(irq - asic->irq_base) >> 4] &= ~bit;
 
-       if (type == IRQT_RISING) {
+       if (type == IRQ_TYPE_EDGE_RISING) {
                trigger |= bit;
                edge |= bit;
-       } else if (type == IRQT_FALLING) {
+       } else if (type == IRQ_TYPE_EDGE_FALLING) {
                trigger |= bit;
                edge &= ~bit;
-       } else if (type == IRQT_BOTHEDGE) {
+       } else if (type == IRQ_TYPE_EDGE_BOTH) {
                trigger |= bit;
                if (asic3_gpio_get(&asic->gpio, irq - asic->irq_base))
                        edge &= ~bit;
                else
                        edge |= bit;
                asic->irq_bothedge[(irq - asic->irq_base) >> 4] |= bit;
-       } else if (type == IRQT_LOW) {
+       } else if (type == IRQ_TYPE_LEVEL_LOW) {
                trigger &= ~bit;
                level &= ~bit;
-       } else if (type == IRQT_HIGH) {
+       } else if (type == IRQ_TYPE_LEVEL_HIGH) {
                trigger &= ~bit;
                level |= bit;
        } else {
                /*
-                * if type == IRQT_NOEDGE, we should mask interrupts, but
+                * if type == IRQ_TYPE_NONE, we should mask interrupts, but
                 * be careful to not unmask them if mask was also called.
                 * Probably need internal state for mask.
                 */
@@ -343,7 +342,7 @@ static int __init asic3_irq_probe(struct platform_device *pdev)
                             ASIC3_INTMASK_GINTMASK);
 
        set_irq_chained_handler(asic->irq_nr, asic3_irq_demux);
-       set_irq_type(asic->irq_nr, IRQT_RISING);
+       set_irq_type(asic->irq_nr, IRQ_TYPE_EDGE_RISING);
        set_irq_data(asic->irq_nr, asic);
 
        return 0;